System Control Block (Scb); Table 50. Summary Of The System Control Block Registers - ST STM32F3 Series Programming Manual

PM0214
4.4

System control block (SCB)

The System control block (SCB) provides system implementation information, and system
control. This includes configuration, control, and reporting of the system exceptions.
Address Name
0xE000E008 ACTLR
0xE000ED00 CPUID
0xE000ED04 ICSR
0xE000ED08 VTOR
0xE000ED0C AIRCR
0xE000ED10 SCR
0xE000ED14 CCR
0xE000ED18 SHPR1
0xE000ED1C SHPR2
0xE000ED20 SHPR3
0xE000ED24 SHCSR RW
0xE000ED28 CFSR
MMSR
0xE000ED28
(2)
(2)
0xE000ED29 BFSR
(2)
0xE000ED2A UFSR
0xE000ED2C HFSR
0xE000ED34 MMAR
0xE000ED38 BFAR
0xE000ED3C AFSR
1. See the register description for more information.
2. A subregister of the CFSR

Table 50. Summary of the system control block registers

Required
Type Reset value
privilege
RW Privileged 0x00000000
RO Privileged 0x410FC241
(1)
RW Privileged 0x00000000
RW Privileged 0x00000000
(1)
RW Privileged 0xFA050000
RW Privileged 0x00000000
RW Privileged 0x00000200
RW Privileged 0x00000000
RW Privileged 0x00000000
RW Privileged 0x00000000
Privileged 0x00000000
RW Privileged 0x00000000
RW Privileged 0x00
RW Privileged 0x00
RW Privileged 0x0000
RW Privileged 0x00000000
RW Privileged Unknown
RW Privileged Unknown
RW Privileged 0x00000000
Table 4.4.1: Auxiliary control register (ACTLR) on
page 222
Table 4.4.2: CPUID base register (CPUID) on page 224
Table 4.4.3: Interrupt control and state register (ICSR)
on page 225
Table 4.4.4: Vector table offset register (VTOR) on
page 227
Table 4.4.5: Application interrupt and reset control
register (AIRCR) on page 228
Table 4.4.6: System control register (SCR) on
page 230
Table 4.4.7: Configuration and control register (CCR)
on page 231
Table 4.4.8: System handler priority registers (SHPRx)
on page 233
Table 4.4.9: System handler control and state register
(SHCSR) on page 235
Table 4.4.10: Configurable fault status register (CFSR;
UFSR+BFSR+MMFSR) on page 237
MemManage Fault Status Register
page 237
BusFault Status Register
UsageFault Status Register
Table 4.4.14: Hard fault status register (HFSR) on
page 241
Table 4.4.15: Memory management fault address
register (MMFAR) on page 242
Table 4.4.16: Bus fault address register (BFAR) on
page 242
Table 4.4.17: Auxiliary fault status register (AFSR) on
page 243
PM0214 Rev 10
Core peripherals
Description
Table 4.4.10 on
Table 4.4.10 on page 237
Table 4.4.10 on page 237
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