Umull, Umaal And Umlal - ST STM32F3 Series Programming Manual

PM0214
3.6.2

UMULL, UMAAL and UMLAL

Unsigned Long Multiply, with Optional Accumulate, 32-bit operands, producing a 64-bit
result.
Syntax
op{cond} RdLo, RdHi, Rn, Rm
Where:
•
'op' is one of the following:
UMULL: Unsigned long multiply.
UMAAL: Unsigned long multiply, with accumulate accumulate.
UMLAL: Unsigned long multiply, with accumulate
•
'cond' is an optional condition code (see
• 'RdHi, RdLo' are the destination registers. They also hold the accumulating value.
•
'Rn, Rm' are registers holding the first and second operands.
Operation
The UMULL instruction:
1. Multiplies the two unsigned integers in the first and second operands.
2. Writes the least significant 32 bits of the result in RdLo.
3. Writes the most significant 32 bits of the result in RdHi.
The UMAAL instruction:
1. Multiplies the two unsigned 32-bit integers in the first and second operands.
2. Adds the unsigned 32-bit integer in RdHi to the 64-bit result of the multiplication.
3. Adds the unsigned 32-bit integer in RdLo to the 64-bit result of the addition.
4. Writes the top 32-bits of the result to RdHi.
5. Writes the lower 32-bits of the result to RdLo.
The UMLAL instruction:
1. Multiplies the two unsigned integers in the first and second operands.
2. Adds the 64-bit result to the 64-bit unsigned integer contained in RdHi and RdLo.
3. Writes the result back to RdHi and RdLo.
Restrictions
In these instructions:
•
Do not use either SP or PC.
•
RdHi and RdLo must be different registers.
Condition flags
These instructions do not affect the condition code flags.
Examples
UMULL
UMAAL
R0, R4, R5, R6 ; Multiplies R5 and R6, writes the top 32 bits to R4
; and the bottom 32 bits to R0
R3, R6, R2, R7 ; Multiplies R2 and R7, adds R6, adds R3, writes the
The STM32 Cortex-M4 instruction set
Conditional execution on page
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