PM0214
3.10.17
VMOV two Arm core registers to two single precision
Transfers two consecutively numbered single-precision registers to and from two Arm core
registers.
Syntax
VMOV{cond} Sm, Sm1, Rt, Rt2
VMOV{cond} Rt, Rt2, Sm, Sm
Where:
•
'cond' is an optional condition code, see
•
'Sm' is the first single-precision register.
•
'Sm1' is a second single-precision register (the next single-precision register after Sm).
•
'Rt' is the Arm core register that Sm is transferred to or from.
•
'Rt2' is the Arm core register that Sm1 is transferred to or from.
Operation
This instruction transfers:
1.
Contents of two consecutively numbered single-precision registers to two Arm core
registers.
2.
Contents of two Arm core registers to a pair of single-precision registers.
Restrictions
The restrictions are:
•
The floating-point registers must be contiguous, one after the other.
•
The Arm core registers do not have to be contiguous.
•
Rt cannot be PC or SP.
Condition flags
These instructions do not change the flags.
The STM32 Cortex-M4 instruction set
Conditional execution on page
PM0214 Rev 10
65.
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261
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