PM0214
3.10
Floating-point instructions
These instructions are only available if the FPU is included, and enabled, in the system. See
Enabling the FPU on page 257
Mnemonic
VABS
VADD
VCMP
VCMPE
VCVT
VCVT
VCVTR
VCVTB
VCVTT
VDIV
VFMA
VFNMA
VFMS
VFNMS
VLDM
VLDR
VLMA
VLMS
VMOV
VMOV
VMOV
VMOV
VMOV
VMOV
VMRS
for information about enabling the floating-point unit.
Table 35. Floating-point instructions
Brief description
Floating-point Absolute
Floating-point Add
Compare two floating-point registers, or one floating-
point register and zero
Compare two floating-point registers, or one floating-
point register and zero with Invalid Operation check
Convert between floating-point and integer
Convert between floating-point and fixed point
Convert between floating-point and integer with
rounding
Converts half-precision value to single-precision
Converts single-precision register to half-precision
Floating-point Divide
Floating-point Fused Multiply Accumulate
Floating-point Fused Negate Multiply Accumulate
Floating-point Fused Multiply Subtract
Floating-point Fused Negate Multiply Subtract
Load Multiple extension registers
Loads an extension register from memory
Floating-point Multiply Accumulate
Floating-point Multiply Subtract
Floating-point Move Immediate
Floating-point Move Register
Copy Arm core register to single precision
Copy 2 Arm core registers to 2 single precision
Copies between Arm core register to scalar
Copies between Scalar to Arm core register
Move to Arm core register from floating-point
System Register
PM0214 Rev 10
The STM32 Cortex-M4 instruction set
VABS on page 151
VADD on page 152
VCMP, VCMPE on page 153
VCMP, VCMPE on page 153
VCVT, VCVTR between floating-
point and integer on page 154
VCVT between floating-point
and fixed-point on page 155
VCVT, VCVTR between floating-
point and integer on page 154
VCVTB, VCVTT on page 156
VCVTB, VCVTT on page 156
VDIV on page 157
VFMA, VFMS on page 158
VFNMA, VFNMS on page 159
VFMA, VFMS on page 158
VFNMA, VFNMS on page 159
VLDM on page 160
VLDR on page 161
VLMA, VLMS on page 162
VLMA, VLMS on page 162
VMOV immediate on page 163
VMOV register on page 164
VMOV scalar to Arm core
register on page 165
VMOV Arm core register to
single precision on page 166
VMOV two Arm core registers to
two single precision on page 167
VMOV Arm Core register to
scalar on page 168
VMRS on page 169
See
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261
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