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16712A
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Verify Net To Label Mapping - Agilent Technologies 16712A Help Manual
128k sample logic analyzer
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Agilent Technologies
16712A
Help Manual
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Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer
Importing Netlist and ASCII Files
2. Select the file from the File Selection dialog box.
3. Select OK
4. Select Next
Verify Net to Label Mapping
1. Verify that each net was properly imported into a label.
2. Select Next
The list provided, see example below, is the mapping from the logic
analyzer pods and channels to labels.
The label column is editable so you can make changes if necessary. If
you need to delete labels, this can be done more efficiently in the next
dialog box.
61
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Chapters
Agilent Technologies 16712A 128K Sample Logic Analyzer
3
When Something Goes Wrong
34
The Format Tab
54
The Trigger Tab
74
Table of Contents
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