Timer Is Off In Sequence Level Where It Is Used; Two Pod Pairs Are Needed To Use Both Timers; Trigger Inhibited During Timing Prestore - Agilent Technologies 16712A Help Manual

128k sample logic analyzer
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Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer
When Something Goes Wrong

Timer is Off in Sequence Level Where It Is Used

Timer controls are available in all sequence levels except the first. You
do not need to turn on the timer in the same sequence level, but it does
need to be on when it is used in the trigger specification.
Possible Causes
This warning occurs because you have used a timer term in your
trigger specification, but not turned the timer on using the timer
controls.
This warning message always occurs with the
Timer is specified in sequence, but never started
error message.
See "Using Timer Terms" on page 96 for more information on timer
control.

Trigger inhibited during timing prestore

The "trigger inhibited" informational message appears when you have a
logic analyzer making a timing measurement, and it is set to a slow
sample rate. The logic analyzer will fill the designated amount of pre-
trigger memory before checking for the trigger condition.
To calculate how long this should take, multiply the sample rate by the
percentage of pre-trigger memory and the acquisition depth. For
example, if
3
sample period = 1.0 ms (sample rate = 10
samples/sec.)
trigger position = center (percentage of pre-trigger memory = 50%)
3
acquisition depth = 64K (roughly 64 x 10
samples)
then the approximate time is 32 seconds.

Two Pod Pairs are Needed To Use Both Timers

Possible Causes
This message only occurs when all pod pairs are assigned, and the
machine which is using both timers has only one pod pair.
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