Agilent Technologies 16712A Help Manual page 13

Chapter 1: Agilent Technologies 16712A 128K Sample Logic Analyzer
Setting Up a Measurement
Choose State or Timing
In a state measurement, the analyzer uses an external clock to
determine when to sample. Each time the analyzer receives a state
clock pulse, it samples and stores the logic state of the target system.
In a timing measurement, the analyzer is analogous to an oscilloscope.
It samples at regular time intervals and displays the information in a
waveform similar to the oscilloscope.
Set Measurement Mode
Each measurement type has different measurement modes. In general,
there is a trade-off between number of signals and speed.
Because the measurement type and mode affect clocking and trigger
options, you must set the measurement type first.
Set up State Clock
For state measurements, you must specify a clock to match the
clocking arrangement used by your target system. It can be as simple
as a single rising edge, or a complex arrangement of up to four signals.
If the clock is incorrect, the trace data may indicate a problem where
there isn't one. Specify the state clock in Clock Setup.
The equivalent in timing mode of the state clock is the Sample Period.
The Sample Period sets the time between logic analyzer samples. For
reliable data, the sample period should be no more than half of your
clock period. Many engineers prefer setting it to one-fourth of the clock
period.
Set up the Trace
The remaining controls finish your description of how you want to
capture data. The trigger position determines where the events you
specify in the trigger sequence will be relative to the majority of the
data the logic analyzer captures.
Memory depth is affected by the measurement mode. Some logic
analyzers also let you limit how big the acquisition will be with an
Acquisiton Depth control.
Step 2: Set Up the Bus Labels (see page 13)
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