External Interrupt - Holtek BS86DH12C Manual

High voltage touch a/d flash mcu with hvio
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BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
subroutine is serviced, all other interrupts will be blocked, as the global interrupt enable bit, EMI
bit will be cleared automatically. This will prevent any further interrupt nesting from occurring.
However, if other interrupt requests occur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be recorded.
If an interrupt requires immediate servicing while the program is already in another interrupt service
routine, the EMI bit should be set after entering the routine to allow interrupt nesting. If the stack
is full, the interrupt request will not be acknowledged, even if the related interrupt is enabled, until
the Stack Pointer is decremented. If immediate service is desired, the stack must be prevented from
becoming full. In case of simultaneous requests, the accompanying diagram shows the priority that
is applied. All of the interrupt request flags when set will wake-up the device if it is in SLEEP or
IDLE Mode, however to prevent a wake-up from occurring the corresponding flag should be set
before the device is in SLEEP or IDLE Mode.
Legend
xxF
Request Flag, no auto reset in ISR
xxF
Request Flag, auto reset in ISR
xxE
Enable Bits
Interrupt
Request
Name
Flags
CTM0 Comp. P CTM0PF
CTM0PE
CTM0 Comp. A CTM0AF
CTM0AE
PTM Comp. P
PTMPF
PTMPE
PTM Comp. A
PTMAF
PTMAE
CTM1 Comp. P CTM1PF
CTM1PE
CTM1 Comp. A CTM1AF
CTM1AE
Interrupts contained within
Multi-Function Interrupts

External Interrupt

The external interrupt is controlled by signal transitions on the INT pin. An external interrupt
request will take place when the external interrupt request flag, INTF, is set, which will occur when
a transition, whose type is chosen by the edge select bits, appears on the external interrupt pin. To
allow the program to branch to its respective interrupt vector address, the global interrupt enable bit,
EMI, and respective external interrupt enable bit, INTE, must first be set. Additionally the correct
interrupt edge type must be selected using the INTEG register to enable the external interrupt
function and to choose the trigger edge type. As the external interrupt pin is pin-shared with I/O
pins, they can only be configured as an external interrupt pin if the external interrupt enable bit in
Rev. 1.00
Interrupt
Name
INT Pin
Touch Key Module
Enable
Time Base
Bits
Multi-Function 0
Multi-Function 1
2
I
C
UART
LVD
A/D Converter
EEPROM
OVP
OCP
HVSC
Interrupt Structure
159
EMI auto disabled in ISR
Request
Enable
Master
Flags
Bits
Enable
INTF
INTE
EMI
TKMF
TKME
EMI
TBF
TBE
EMI
MF0F
MF0E
EMI
EMI
MF1F
MF1E
IICF
IICE
EMI
URF
URE
EMI
LVF
LVE
EMI
ADF
ADE
EMI
DEF
DEE
EMI
OVPF
OVPE
EMI
OCPF
OCPE
EMI
EMI
HVSCF
HVSCE
Vector
Priority
High
04H
08H
0CH
10H
14H
18H
1CH
20H
24H
28H
2CH
30H
34H
Low
October 26, 2018

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