Holtek BS86DH12C Manual page 51

BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
SLOW Mode to FAST Mode Switching
In SLOW mode the system clock is derived from f
FAST mode from f
clock will respectively be switched to f
However, if f
H
re-oscillate and stabilise when switching to the FAST mode from the SLOW Mode. This is
monitored using the HIRCF bit in the HIRCC register. The time duration required for the high speed
system oscillator stabilization is specified in the System Start Up Time Characteristics.
Entering the SLEEP Mode
There is only one way for the device to enter the SLEEP Mode and that is to execute the "HALT"
instruction in the application program with both the FHIDEN and FSIDEN bits in the SCC register
equal to "0". When this instruction is executed under the conditions described above, the following
will occur:
• The system clock will be stopped and the application program will stop at the "HALT"
instruction.
• The Data Memory contents and registers will maintain their present condition.
• The I/O ports will maintain their present conditions.
• In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO,
will be cleared.
• The WDT will be cleared and resume counting as the WDT function is always enabled.
Rev. 1.00
, the CKS2~CKS0 bits should be set to "000"~"110" and then the system
SUB
~f /64.
H H
is not used in SLOW mode and thus switched off, it will take some time to
FHIDEN=0, FSIDEN=0
HALT instruction is executed
FHIDEN=0, FSIDEN=1
HALT instruction is executed
FHIDEN=1, FSIDEN=1
HALT instruction is executed
IDLE1 Mode
FHIDEN=1, FSIDEN=0
HALT instruction is executed
IDLE2 Mode
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. When system clock is switched back to the
SUB
SLOW Mode
CKS2~CKS0 = 000~110
FAST Mode
SLEEP Mode
IDLE0 Mode
October 26, 2018