Holtek BS86DH12C Manual page 88

Counter Value
CCRP
CCRA
CTnON
CTnPAU
CTnPOL
CCRA Int.
Flag CTMnAF
CCRP Int.
Flag CTMnPF
CTMn O/P Pin
(CTnOC=1)
CTMn O/P Pin
(CTnOC=0)
PWM Duty Cycle
set by CCRA
Note: 1. Here CTnDPX=0 – Counter cleared by CCRP
2. A counter clear sets the PWM Period
3. The internal PWM function continues running even when CTnIO[1:0]=00 or 01
4. The CTnCCLR bit has no influence on PWM operation
Rev. 1.00
High Voltage Touch A/D Flash MCU with HVIO
Counter cleared by
CCRP
Pause
PWM Period set by CCRP
PWM Output Mode – CTnDXP=0 (n=0~1)
88
BS86DH12C
CTnDPX = 0; CTnM [1:0] = 10
Counter Reset when
CTnON returns high
Counter Stop if
Resume
CTnON bit low
PWM resumes
operation
Output controlled by
other pin-shared function
Output Inverts
when CTnPOL = 1
October 26, 2018
Time