I 2 C Bus Communication - Holtek BS86DH12C Manual

BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
HBB: I
Bit 5
0: I
1: I
The HBB flag is the I
which will occur when a START signal is detected. The flag will be set to "0" when
the bus is free which will occur when a STOP signal is detected.
Bit 4 HTX: I
0: Slave device is the receiver
1: Slave device is the transmitter
Bit 3 TXAK: I
0: Slave send acknowledge flag
1: Slave do not send acknowledge flag
The TXAK bit is the transmit acknowledge flag. After the slave device receipt of 8 bits
of data, this bit will be transmitted to the bus on the 9th clock from the slave device.
The slave device must always set TXAK bit to "0" before further data is received.
Bit 2 SRW: I
0: Slave device should be in receive mode
1: Slave device should be in transmit mode
The SRW flag is the I
the master device wishes to transmit or receive data from the I
transmitted address and slave address is match, that is when the HAAS flag is set high,
the slave device will check the SRW flag to determine whether it should be in transmit
mode or receive mode. If the SRW flag is high, the master is requesting to read data
from the bus, so the slave device should be in transmit mode. When the SRW flag
is zero, the master will write data to the bus, therefore the slave device should be in
receive mode to read this data.
Bit 1 IAMWU: I
0: Disable
1: Enable
This bit should be set to 1 to enable the I
or IDLE Mode. If the IAMWU bit has been set before entering either the SLEEP or
IDLE mode to enable the I
the application program after wake-up to ensure correction device operation.
Bit 0 RXAK: I
0: Slave receive acknowledge flag
1: Slave does not receive acknowledge flag
The RXAK flag is the receiver acknowledge flag. When the RXAK flag is "0", it
means that a acknowledge signal has been received at the 9th clock, after 8 bits of data
have been transmitted. When the slave device in the transmit mode, the slave device
checks the RXAK flag to determine if the master receiver wishes to receive the next
byte. The slave transmitter will therefore continue sending out data until the RXAK
flag is "1". When this occurs, the slave transmitter will release the SDA line to allow
the master to send a STOP signal to release the I
I C Bus Communication
2
Communication on the I
transmission, a data transmission and finally a STOP signal. When a START signal is placed on
the I C bus, all devices on the bus will receive this signal and be notified of the imminent arrival of
2
data on the bus. The first seven bits of the data will be the slave address with the first bit being the
MSB. If the address of the slave device matches that of the transmitted address, the HAAS bit in the
IICC1 register will be set and an I
routine, the slave device must first check the condition of the HAAS and IICTOF bits to determine
whether the interrupt source originates from an address match or from the completion of an 8-bit
Rev. 1.00
C Bus busy flag
2
C Bus is not busy
2
C Bus is busy
2
C busy flag. This flag will be "1" when the I
2
C slave device is transmitter or receiver selection
2
C Bus transmit acknowledge flag
2
C Slave Read/Write flag
2
C Slave Read/Write flag. This flag determines whether
2
C Address Match Wake-up control
2
C address match wake up, then this bit must be cleared by
2
C Bus Receive acknowledge flag
2
C bus requires four separate steps, a START signal, a slave device address
2
C interrupt will be generated. After entering the interrupt service
2
133
C bus is busy
2
C bus. When the
2
C address match wake up from the SLEEP
2
C Bus.
2
October 26, 2018