Holtek BS86DH12C Manual page 171

BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
Mnemonic
Branch
LSZ [m] Skip if Data Memory is zero
LSZA [m] Skip if Data Memory is zero with data movement to ACC
LSNZ [m] Skip if Data Memory is not zero
LSZ [m].i Skip if bit i of Data Memory is zero
LSNZ [m].i Skip if bit i of Data Memory is not zero
LSIZ [m] Skip if increment Data Memory is zero
LSDZ [m] Skip if decrement Data Memory is zero
LSIZA [m] Skip if increment Data Memory is zero with result in ACC
LSDZA [m] Skip if decrement Data Memory is zero with result in ACC
Table Read
LTABRD [m] Read table to TBLH and Data Memory
LTABRDL [m] Read table (last page) to TBLH and Data Memory
LITABRD [m] Increment table pointer TBLP first and Read table to TBLH and Data Memory
Increment table pointer TBLP first and Read table (last page) to TBLH and
LITABRDL [m]
Data Memory
Miscellaneous
LCLR [m] Clear Data Memory
LSET [m] Set Data Memory
LSWAP [m] Swap nibbles of Data Memory
LSWAPA [m] Swap nibbles of Data Memory with result in ACC
Note: 1. For these extended skip instructions, if the result of the comparison involves a skip then up to four cycles
are required, if no skip takes place two cycles is required.
2. Any extended instruction which changes the contents of the PCL register will also require three cycles for
execution.
Rev. 1.00
Description
171
Cycles Flag Affected
2 Note None
2 Note None
2 Note None
2 Note None
2 Note None
2 Note None
2 Note None
2 Note None
2 Note None
3 Note None
3 Note None
3 Note None
3 Note None
2 Note None
2 Note None
2 Note None
2 None
October 26, 2018