Holtek BS86DH12C Manual page 130

still applicable even if the I
controlled by its corresponding pull-high control register.
f
HTX
SYS
SCL Pin
Debounce
Circuitry
SDA Pin
IICDEB[1:0]
IICTOEN
The IICDEB1 and IICDEB0 bits determine the debounce time of the I
internal clock to in effect add a debounce time to the external clock to reduce the possibility of
glitches on the clock line causing erroneous operation. The debounce time, if selected, can be
chosen to be either 2 or 4 system clocks. To achieve the required I
exists a relationship between the system clock, f
Standard or Fast mode operation, users must take care of the selected system clock frequency and
the configured debounce time to match the criterion shown in the following table.
Rev. 1.00
High Voltage Touch A/D Flash MCU with HVIO
C device is activated and the related internal pull-high function could be
2
2
I C Data Register
(IICD)
Direction Control
Data in MSB
Shift Register
Read/Write Slave
M
Data out MSB
U
TXAK
X
8-bit Data Transfer Complete -
Transmit/
Receive
Detect Start or Stop
Control Unit
Time-out
f
SUB
Control
Address Match
I C Block Diagram
2
START signal
from Master
Send slave address
and R/W bit from Master
Acknowledge
from slave
Send data byte
from Master
Acknowledge
from slave
STOP signal
from Master
I C Interface Operation
2
130
Data Bus
2
I C Address Register
(IICA)
Address
HAAS
Address Match -
Comparator
SRW
HCF
HBB
IICTOF
C interface. This uses the
2
C data transfer speed, there
2
, and the I C debounce time. For either the I
2
SYS
BS86DH12C
2
I C Interrupt
C
2
October 26, 2018