Holtek BS86DH12C Manual page 123

BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
• OCPC1 Register
Bit 7
Name —
R/W —
POR —
Bit 7~6 Unimplemented, read as "0"
G2~G0: PGA R2/R1 ratio selection
Bit 5~3
000: Unity gain buffer (non-inverting mode) or R2/R1=1 (inverting mode)
001: R2/R1=5
010: R2/R1=10
011: R2/R1=15
100: R2/R1=20
101: R2/R1=30
110: R2/R1=40
111: R2/R1=50
These bits are used to select the R2/R1 ratio to obtain various gain values for inverting
and non-inverting mode. The calculating formula of the PGA gain for the inverting
and non-inverting mode is described in the "Input Voltage Range" section.
Bit 2~0 OCPDEB2~OCPDEB0: OCP output filter debounce time selection
000: Bypass, without debounce
001: (1~2)×t
010: (3~4)×t
011: (7~8)×t
100: (15~16)×t
101: (31~32)×t
110: (63~64)×t
111: (127~128)×t
Note: t
• OCPDA Register
Bit 7
Name D7
R/W R/W
POR 0
Bit 7~0 D7~D0: OCP D/A converter output voltage control bits
DAC V
• OCPOCAL Register
Bit 7
Name OCPOOFM OCPORSP OCPOOF5 OCPOOF4 OCPOOF3 OCPOOF2 OCPOOF1 OCPOOF0
R/W R/W
POR 0
Bit 7 OCPOOFM: OCP Operational Amplifier Input Offset Calibration Mode enable control
0: Input Offset Calibration Mode disabled
1: Input Offset Calibration Mode enabled
This bit is used to control the OCP operational amplifier input offset Calibration
function. The OCPEN1 and OCPEN0 bits must first be set to "11" and then the
OCPOOFM bit must be set to 1 followed by the OCPCOFM bit being setting to 0,
then the operational amplifier input offset Calibration mode will be enabled. Refer
to the "Operational Amplifier Input Offset Calibration" section for the detailed offset
Calibration procedures.
Rev. 1.00
6 5 4
— G2 G1
— R/W R/W
— 0 0
DEB
DEB
DEB
DEB
DEB
DEB
DEB
=1/f .
DEB SYS
6 5 4
D6 D5 D4
R/W R/W R/W
0 0 0
=(D/A converter reference voltage/256)×OCPDA[7:0]
OUT
6 5 4
R/W R/W R/W
0 1 0
123
3 2 1
G0 OCPDEB2 OCPDEB1 OCPDEB0
R/W R/W R/W
0 0 0
3 2 1
D3 D2 D1
R/W R/W R/W
0 0 0
3 2 1
R/W R/W R/W
0 0 0
October 26, 2018
0
R/W
0
0
D0
R/W
0
0
R/W
0