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Holtek BS66F340C Manual

Touch a/d flash mcu
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Touch A/D Flash MCU
BS66F340C/BS66F350C/BS66F360C
Revision: V1.11
Date: November 09, 2023

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Summary of Contents for Holtek BS66F340C

  • Page 1 Touch A/D Flash MCU BS66F340C/BS66F350C/BS66F360C Revision: V1.11 Date: November 09, 2023...
  • Page 2 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Table of Contents Features ......................... 7 CPU Features ..........................7 Peripheral Features ........................7 Development Tools ....................8 General Description ....................8 Selection Table ...................... 8 Block Diagram ....................... 9 Pin Assignment ..................... 9 Pin Description ....................12 Absolute Maximum Ratings ................
  • Page 3 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU In Circuit Programming – ICP .....................37 On-Chip Debug Support – OCDS ....................38 In Application Programming – IAP ....................38 Data Memory ....................... 58 Structure ............................58 Data Memory Addressing ......................59 General Purpose Data Memory ....................59 Special Purpose Data Memory ....................59 Special Function Register Description .............
  • Page 4 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Reset and Initialisation ..................86 Reset Functions ..........................87 Reset Initial Conditions .......................90 Input/Output Ports ....................95 Pull-high Resistors ........................97 Port A Wake-up ...........................97 I/O Port Control Registers ......................97 I/O Port Source Current Selection ....................98 I/O Port Sink Current Selection ....................99 I/O Port Power Source Control ....................102...
  • Page 5 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Serial Interface Module – SIM ................169 SPI Interface ..........................169 C Interface ..........................176 UART Interface ....................185 UART External Pins ........................186 UART Data Transfer Scheme....................186 UART Status and Control Registers..................187 Baud Rate Generator ........................192 UART Setup and Control......................193 UART Transmitter........................194...
  • Page 6 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Arithmetic Operations ........................227 Logical and Rotate Operation ....................228 Branches and Control Transfer ....................228 Bit Operations ...........................228 Table Read Operations ......................228 Other Operations ........................228 Instruction Set Summary ................. 229 Table Conventions ........................229 Extended Instruction Set ......................231 Instruction Definition ..................
  • Page 7 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Features CPU Features • Operating voltage =4MHz: 2.2V~5.5V ♦ =8MHz: 2.2V~5.5V ♦ =12MHz: 2.7V~5.5V ♦ =16MHz: 3.3V~5.5V ♦ • Up to 0.25μs instruction cycle with 16MHz system clock at V • Power down and wake-up functions to reduce power consumption •...
  • Page 8 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Development Tools For rapid product development and to simplify device parameter setting, Holtek has provided relevant development tools which users can download from the following link: https://www.holtek.com/page/detail/dev_plat/Touch_Workshop General Description The series of devices are A/D Flash Memory type 8-bit high performance RISC architecture microcontrollers with fully integrated touch key functions.
  • Page 9 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Block Diagram Port A Driver PA0~PA7 Timers Reset 16K × 16 1024 × 8 Port B Driver PB0~PB7 Circuit EEPROM Stack Port C Driver PC0~PC7 128 × 8 12-Level Pin-Shared Interrupt INT0~INT1 Function Controller Port D Driver...
  • Page 10 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU PA1/CTP0/RX/SCK/SCL PB3/RX/AN3 PA5/CTP0B/TX/SDI/SDA PB4/PTP/PTPI/AN4/KEY1 PA6/CTCK0/INT0/RX/SCK/SCL PB5/STCK/AN5/KEY2 PB6/PTCK/AN6/KEY3 PA7/TX/SDI/SDA PB7/INT1/AN7/KEY4 BS66F350C/BS66V350C PC2/KEY7 44 LQFP-A PC3/KEY8 PC4/KEY9 PC5/KEY10 PE7/CTP1B PC6/KEY11 PE6/CTP1 PC7/KEY12 12 13141516171819 20 2122 PB4/PTPB/PTPI/AN4/KEY1 PA1/CTP0/RX/SCK/SCL PA5/CTP0B/TX/SDI/SDA PB5/STCK/AN5/KEY2 PB6/PTCK/AN6/KEY3 PA6/CTCK0/INT0/RX/SCK/SCL PA7/TX/SDI/SDA PB7/INT1/AN7/KEY4 PC0/KEY5 BS66F350C/BS66V350C PC1/KEY6...
  • Page 11 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU PA1/CTP0 PB3/RX/AN3 PA5/CTP0B PB4/PTPB/PTPI/AN4/KEY1 PA6/CTCK0/INT0 PB5/STCK/AN5/KEY2 PB6/PTCK/AN6/KEY3 PF5/RX/SCK/SCL PB7/INT1/AN7/KEY4 BS66F360C/BS66V360C PC2/KEY7 PF3/TX/SDI/SDA 44 LQFP-A PF2/VDDIO PC3/KEY8 PF1/KEY28 PC4/KEY9 PF0/KEY27 PC5/KEY10 PE7/CTP1B/KEY26 PC6/KEY11 PE6/CTP1/KEY25 PC7/KEY12 12 13 14 15 16 17 18 19 20 21 22...
  • Page 12 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU 3. For less pin-count package types there will be unbonded pins which should be properly configured to avoid unwanted current consumption resulting from floating input conditions. Refer to the “Standby Current Considerations” and “Input/Output Ports” sections.
  • Page 13 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PAWU General purpose I/O. Register enabled pull-up and PAPU CMOS wake-up. PAS1 CTP0B PAS1 CMOS CTM0 inverted output — PA5/CTP0B/TX/SDI/SDA PAS1 CMOS UART TX serial data output — PAS1 SIM SPI serial data input —...
  • Page 14 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PBPU CMOS General purpose I/O. Register enabled pull-up. PBS1 STCK PBS1 STM clock input PB5/STCK/AN5/KEY2 — PBS1 A/D Converter analog input — KEY2 PBS1 Touch key input — PBPU CMOS General purpose I/O. Register enabled pull-up.
  • Page 15 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PEPU CMOS General purpose I/O. Register enabled pull-up. PES1 PE5/CTP1B/OSC2 CTP1B PES1 CTM1 inverted output — OSC2 PES1 HXT oscillator pin — Positive power supply — — Negative power supply, ground.
  • Page 16 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PAWU General purpose I/O. Register enabled pull-up and CMOS PAPU wake-up. CTCK0 CTM0 clock input — — INTEG INT0 External Interrupt input 0 — INTC0 PA6/CTCK0/INT0/RX/ PAS1 SCK/SCL UART RX serial data input —...
  • Page 17 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PBPU CMOS General purpose I/O. Register enabled pull-up. PBS1 STCK PBS1 STM clock input PB5/STCK/AN5/KEY2 — PBS1 A/D Converter analog input — KEY2 PBS1 Touch key input — PBPU CMOS General purpose I/O. Register enabled pull-up.
  • Page 18 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PDPU CMOS General purpose I/O. Register enabled pull-up. PDS0 PD3/KEY16 KEY16 PDS0 Touch key input — PDPU CMOS General purpose I/O. Register enabled pull-up. PDS1 PD4/KEY17 KEY17 PDS1 Touch key input —...
  • Page 19 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU BS66F360C Pin Name Function Description PAWU General purpose I/O. Register enabled pull-up and PAPU CMOS wake-up. PAS0 PA0/SDO/ICPDA/ PAS0 — CMOS SIM SPI serial data output OCDSDA ICPDA — CMOS ICP Data/Address pin OCDSDA —...
  • Page 20 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PBPU CMOS General purpose I/O. Register enabled pull-up. PBS0 PBS0 CMOS SIM SPI serial clock IFS1 PB1/SCK/SCL/AN1 PBS0 NMOS SIM I C clock line IFS1 PBS0 — A/D Converter analog input PBPU CMOS General purpose I/O.
  • Page 21 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PCPU CMOS General purpose I/O. Register enabled pull-up. PCS0 PC3/KEY8 KEY8 PCS0 — Touch key input PCPU CMOS General purpose I/O. Register enabled pull-up. PCS1 PC4/KEY9 KEY9 PCS1 — Touch key input PCPU CMOS General purpose I/O.
  • Page 22 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description PEPU CMOS General purpose I/O. Register enabled pull-up. PES0 STPB PES0 — CMOS STM inverted output PE3/STPB/STPI/KEY24 PES0 STPI — STM capture input IFS0 KEY24 PES0 — Touch key input PEPU CMOS General purpose I/O.
  • Page 23 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pin Name Function Description — — Positive power supply — — Negative power supply, ground. Legend: I/T: Input type; O/T: Output type; OPT: Optional by register option; PWR: Power; ST: Schmitt Trigger input; AN: Analog signal;...
  • Page 24 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Operating Current Characteristics Ta=-40°C~85°C Test Conditions Symbol Operation Mode Min. Typ. Max. Unit Conditions 2.2V — SLOW Mode – LIRC =32kHz — μA — 2.2V — 24.5 SLOW Mode – LXT =32768Hz — μA —...
  • Page 25 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Standby Current Characteristics Ta=25°C, unless otherwise specified. Test Conditions Max.@ Symbol Operation Mode Min. Typ. Max. Unit 85°C Conditions 2.2V — — SLEEP Mode WDT on — — μA — — 2.2V — — IDLE0 Mode – LIRC —...
  • Page 26 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU A.C. Characteristics For data in the following tables, note that factors such as oscillator type, operating voltage, operating frequency and temperature, can all exert an influence on the measured values. High Speed Internal Oscillator – HIRC – Frequency Accuracy During the program writing operation the writer will trim the HIRC oscillator at a user selected HIRC frequency and user selected voltage of either 3V or 5V.
  • Page 27 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU External 32768Hz Crystal Oscillator – LXT – Frequency Accuracy Test Conditions Symbol Parameter Min. Typ. Max. Unit Temp. Oscillator Frequency 2.2V~5.5V -40°C~85°C — 32768 — Duty Cycle Duty Cycle — -40°C~85°C — -40°C~85°C — —...
  • Page 28 Output Low Voltage for I/O Ports 5V I =34mA — — Sink Current for I/O Port =0.1V , PxNSn=0 — (BS66F340C: PA2~PA0, PA5 , PE3~PE0; =0.1V , PxNSn=1 — BS66F350C: PA7~PA5, PA1, PE7~PE6, PE3~PE2; =0.1V , PxNSn=0 — BS66F360C: PA7~PA5, PA1, PE7~PE6, =0.1V...
  • Page 29 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Input/Output (with Multi-power) D.C. Characteristics (For BS66F360C olny) Ta=-40°C~85°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions Power Supply for — — PF3~PF5 Pins Power Supply for DDIO — — — DDIO PF3~PF5 Pins...
  • Page 30 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Memory Characteristics Ta=-40°C~85°C, unless otherwise specified. Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions Read / Write Operating Voltage — — — DDmin DDmax Flash Program / Data EEPROM Memory Write Cycle Time – Data EEPROM Memory —...
  • Page 31 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Internal Reference Voltage Characteristics Ta=-40°C~85°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions Bandgap Reference Voltage — — 1.04 turn-on Stable Time — No load — — μs Note: The V voltage is used as the A/D converter internal signal input.
  • Page 32 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU System Architecture A key factor in the high-performance features of the range of microcontrollers is attributed to their internal system architecture. The range of devices take advantage of the usual features found within RISC microcontrollers providing increased speed of operation and enhanced performance. The...
  • Page 33 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Fetch Inst. 1 Execute Inst. 1 MOV A,[12H] Fetch Inst. 2 Execute Inst. 2 CALL DELAY Fetch Inst. 3 Flush Pipeline CPL [12H] Fetch Inst. 6 Execute Inst. 6 Fetch Inst. 7 6 DELAY: NOP...
  • Page 34 Pointer Program Memory Bottom of Stack Stack Level N Note: N=8 for BS66F340C/BS66F350C; N=12 for BS66F360C. Arithmetic and Logic Unit – ALU The arithmetic-logic unit or ALU is a critical area of the microcontroller that carries out arithmetic and logic operations of the instruction set. Connected to the main microcontroller data bus, the ALU receives related instruction codes and performs the required arithmetic or logical operations after which the result will be placed in the specified register.
  • Page 35 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Flash Program Memory The Program Memory is the location where the user code or program is stored. For these devices the Program Memory is Flash type, which means it can be programmed and re-programmed a large number of times, allowing the user the convenience of code modification on the same device.
  • Page 36 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU when the memory [m] is located in Sector 0. If the memory [m] is located in other sectors except Sector 0, the data can be retrieved from the program memory using the corresponding extended table read instruction such as “LTABRD [m]”...
  • Page 37 The provision of Flash type Program Memory provides the user with a means of convenient and easy upgrades and modifications to their programs on the same device. As an additional convenience, Holtek has provided a means of programming the microcontroller in-circuit using a 4-pin interface. This provides manufacturers with the possibility of manufacturing their circuit boards complete with a programmed or un-programmed microcontroller, and then programming or upgrading the program at a later stage.
  • Page 38 Flash Memory Read/Write Size For the BS66F340C device, the Flash memory Erase operation is carried out in a block format while the Write operation is carried out in 4-word format and the Read operation is carried out in a word format.
  • Page 39 1011 xxxx xxxx 1100 xxxx xxxx 1101 xxxx xxxx 1110 xxxx xxxx 1111 xxxx xxxx “x”: don't care Erase Block Number and Selection – BS66F340C Write Unit FARH[3:0] FARL[7:2] FARL[1:0] 0000 0000 00 0000 0000 01 0000 0000 10 0000...
  • Page 40 Write Unit FARH[3:0] FARL[7:2] FARL[1:0] 1022 1111 1111 10 1023 1111 1111 11 “x”: don’t care Write Unit Number and Selection – BS66F340C FARL[4:0] Erase Page FARH FARL[7:5] 0000 0000 x xxxx 0000 0000 x xxxx 0000 0000 x xxxx...
  • Page 41 Note: “m” is specified by FA11~FA0 FD2H FD2L FD3H FD3L Note: “i” is specified by FA11~FA2 Flash Memory IAP Read/Erase/Write Structure – BS66F340C Write page data to FD0L/FD0H Read data word to FD0H/FD0L (32 words/page) Flash Memory Flash Memory Page addr.
  • Page 42 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Write page data to FD0L/FD0H Read data word to FD0H/FD0L (64 words/page) Flash Memory Flash Memory FARH/FARL Page addr. FARH/FARL Word m =FA13~FA6 =FA13~FA0 =FA13~FA0 Page n Write buffer addr. =FA5~FA0 000000b FD0H FD0L Write Buffer Note: “m”...
  • Page 43 Erase/Write function Enable Mode” should first be successfully enabled before the Erase or Write Flash memory operation is executed. When these bits are set to "001", the "Block erase" mode is selected for BS66F340C while the "Page erase" mode is selected for BS66F350C/BS66F360C.
  • Page 44 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU This bit is used to activate the Flash memory Erase/Write function enable procedure and an internal timer. It is set by the application programs and then cleared to 0 by the hardware when the internal timer times out. The correct patterns must be written into the FD1L/FD1H, FD2L/FD2H and FD3L/FD3H register pairs respectively as soon as possible after the FWPEN bit is set high.
  • Page 45 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • FARL Register Name Bit 7~0 Flash Memory Address bit 7 ~ bit 0 • FARH Register – BS66F340C Name — — — — FA11 FA10 — — — — — — — — Bit 7~4 Unimplemented, read as “0”...
  • Page 46 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • FD0H Register Name Bit 7~0 The first Flash Memory data word bit 15 ~ bit 8 Note that when 8-bit data is written into the high byte data register FD0H, the whole 16 bits of data stored in the FD0H and FD0L registers will simultaneously be loaded into the 16-bit write buffer after which the contents of the Flash memory address register pair, FARH and FARL, will be incremented by one.
  • Page 47 If the data read from the flash memory is different from the written data, it means that the block/page write operation has failed. For the BS66F340C device, go back to Step 2 and execute the block erase operation again. For the BS66F350C/BS66F360C devices, the CLWB bit should be set high to clear the write buffer and then write the data into the specific block/page again if the write operation has failed.
  • Page 48 (CFWEN=1) Block Erase Flash Memory Blank Check Block Data =0000h ? Flash Memory (Block) Write Procedure Verify Block Data Correct ? Clear CFWEN bit Disable Flash Memory Erase/Write Function Flash Memory Erase/Write Flow – BS66F340C Rev. 1.11 November 09, 2023...
  • Page 49 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Flash Memory Erase/Write Flow Flash Memory Erase/Write Function Enable Procedure (CFWEN=1) Page Erase Flash Memory Blank Check Page Data=0000h? Flash Memory (Page) Write Procedure Set CLWB bit Verify Page Data Correct? Clear CFWEN bit Disable Flash Memory Erase/Write Function Flash Memory Erase/Write Flow –...
  • Page 50 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Flash Memory Erase/Write Function Enable Procedure The Flash Memory Erase/Write Function Enable Mode is specially designed to prevent the flash memory contents from being wrongly modified. In order to allow users to change the Flash memory data using the IAP control registers, users must first enable the Flash memory Erase/Write function.
  • Page 51 FD0H registers within a page as specified by their consecutive addresses. The maximum written data number is 32 or 64 words. 6. For the BS66F340C device, set the FWT bit high to write the data words to the Flash memory at four consecutive addresses starting from FARL[1:0]=00b.For the BS66F350C/BS66F360C devices, set the FWT bit high to write the data words from the write buffer to the flash memory.
  • Page 52 7. Verify the data using the table read instruction to ensure that the write operation has successfully completed. For the BS66F340C device, if the write operation has not successfully completed, then go to step 2. For the BS66F350C/BS66F360C devices, if the write operation has not successfully completed, set the CLWB bit high to clear the write buffer and then go to step 5.
  • Page 53 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Write Flash Memory Flash Memory Erase/Write Function Enable Procedure Page Erase FARH=xxH, FARL=xxH FMOD[2:0]=001 FWT=1 FWT=0 ? Blank Check with Table Read instruction Blank Check Page Data=0000h? Write FMOD[2:0]=000 Specify Flash Memory Address FARH=xxH, FARL=xxH...
  • Page 54 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Flash Memory Non-Consecutive Write Descriptionfor the BS66F350C/BS66F360C devices The main difference between Flash Memory Consecutive and Non-Consecutive Write operations is whether the data words to be written are located in consecutive addresses or not. If the data to be written is not located in consecutive addresses the desired address should be re-assigned after a data word is successfully written into the Flash Memory.
  • Page 55 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Write Flash Memory Flash Memory Erase/Write Function Enable Procedure Page Erase FARH=xxH, FARL=xxH FMOD[2:0]=001 FWT=1 FWT=0 ? Blank Check with Table Read instruction Blank Check Page Data=0000h? Write FMOD[2:0]=000 Specify Flash Memory Address FARH=xxH, FARL=xxH...
  • Page 56 4. After the data is written into the flash memory the flash memory contents must be read out using the table read instruction, TABRD, and checked if it is correct or not. For the BS66F340C device, if the data written into the Flash memory is incorrect, erase the block and then activate a write operation on the same Flash memory block.
  • Page 57 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Flash Memory Read Procedure To activate the Flash Memory Read procedure, the FMOD field should be set to “011” to select the flash memory read mode and the FRDEN bit should be set high to enable the read function.
  • Page 58 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Data Memory The Data Memory is a volatile area of 8-bit wide RAM internal memory and is the location where temporary information is stored. Categorized into two types, the first of these is an area of RAM where special function registers are located.
  • Page 59 Data Memory (Sector 0 ~ Sector N) Sector 0 Sector 1 Sector N Note: N=3 for BS66F340C; N=5 for BS66F350C; N=7 for BS66F360C. Data Memory Structure Data Memory Addressing For these devices that supports the extended instructions, there is no Bank Pointer for Data Memory addressing.
  • Page 60 MFI3 SADOL SADOH SADC0 SADC1 PSC0R PEPU TB0C TB1C SIMTOC SIMC0 SIMC1 UCR1 SIMD UCR2 SIMA/SIMC2 TXR_RXR CTM0C0 CTM0C1 CTM0DL CTM0DH CTM0AL CTM0AH : Unused, read as 00H Special Purpose Data Memory Structure – BS66F340C Rev. 1.11 November 09, 2023...
  • Page 61 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Sector 0 Sector 1 Sector 0 Sector 1 IAR0 TKTMR TKC0 IAR1 TK16DL MP1L TK16DH IFS1 MP1H TKC1 PSC1R IFS0 TKM016DL PAS0 TKM016DH SLEDC PAS1 TBLP TKM0ROL PBS0 TBLH TKM0ROH PTMC0 PBS1 TBHP TKM0C0 PTMC1...
  • Page 62 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Sector 0 Sector 1 Sector 0 Sector 1 IAR0 TKTMR TKC0 IAR1 TK16DL MP1L TK16DH IFS1 MP1H TKC1 PSC1R IFS0 TKM016DL PAS0 TKM016DH SLEDC PAS1 TBLP TKM0ROL PBS0 TBLH TKM0ROH PTMC0 PBS1 TBHP TKM0C0 PTMC1...
  • Page 63 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Special Function Register Description Most of the Special Function Register details will be described in the relevant functional sections. However, several registers require a separate description in this section. Indirect Addressing Registers – IAR0, IAR1, IAR2 The Indirect Addressing Registers, IAR0, IAR1 and IAR2, although having their locations in normal RAM register space, do not actually physically exist as normal registers.
  • Page 64 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Indirect Addressing Program Example 2 data .section ´data´ adres1 db ? adres2 db ? adres3 db ? adres4 db ? block db ? code .section at 0 ´code´ org 00h start: mov a, 04h ; set size of block...
  • Page 65 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Program Memory Bank Pointer – PBP For the BS66F360C device the Program Memory is divided into two banks. Selecting the required Program Memory area is achieved using the Program Memory Bank Pointer, PBP. The PBP register should be properly configured before the device executes the “Branch”...
  • Page 66 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Status Register – STATUS This 8-bit register contains the SC flag, CZ flag, zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow flag (OV), power down flag (PDF), and watchdog time-out flag (TO). These arithmetic/logical operation and system management flags are used to record the status and operation of the microcontroller.
  • Page 67 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • STATUS Register Name “x”: unknown SC: The result of the “XOR” operation which is performed by the OV flag and the Bit 7 MSB of the instruction operation result. Bit 6 CZ: The operational result of different flags for different instructions.
  • Page 68 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU EEPROM Data Memory These devices contain an area of internal EEPROM Data Memory. EEPROM is by its nature a non- volatile form of re-programmable memory, with data retention even when its power supply is removed.
  • Page 69 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • EED Register Name Bit 7~0 D7~D0: Data EEPROM data bit 7 ~ bit 0 • EEC Register Name — — — — WREN RDEN — — — — — — — — Bit 7~4 Unimplemented, read as “0”...
  • Page 70 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Reading Data from the EEPROM To read data from the EEPROM, the EEPROM address of the data to be read must first be placed in the EEA register. The read enable bit, RDEN, in the EEC register must then be set high to enable the read function.
  • Page 71 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Programming Considerations Care must be taken that data is not inadvertently written to the EEPROM. Protection can be enhanced by ensuring that the Write Enable bit is normally cleared to zero when not writing. Also the Memory Pointer high byte register, MP1H or MP2H, could be normally cleared to zero as this would inhibit access to Sector 1 where the EEPROM control register exists.
  • Page 72 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Oscillators Various oscillator types offer the user a wide range of functions according to their various application requirements. The flexible features of the oscillator functions ensure that the best optimisation can be achieved in terms of speed and power saving. Oscillator selections and operation are selected through a combination of configuration option and relevant control registers.
  • Page 73 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU High Speed Oscillators HXTEN IDLE0 Prescaler HIRCEN HIRC SLEEP Low Speed Oscillators LXTEN CKS2~CKS0 IDLE2 LIRC SLEEP LIRC System Clock Configurations External Crystal/Resonator Oscillator – HXT The External Crystal/Resonator Oscillator is one of the high frequency oscillators. For most crystal oscillator configurations, the simple connection of a crystal across OSC1 and OSC2 will create the necessary phase shift and feedback for oscillation, without requiring external capacitors.
  • Page 74 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Internal High Speed RC Oscillator – HIRC The internal RC oscillator is a fully integrated oscillator requiring no external components. The internal RC oscillator has three fixed frequencies of 8MHz, 12MHz and 16MHz, which are selected using a configuration option.
  • Page 75 As Holtek has provided these devices with both high and low speed clock sources and the means to switch between them dynamically, the user can optimise the operation of their microcontroller to achieve the best performance/power ratio.
  • Page 76 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The main system clock can come from a high frequency f or low frequency f source, and is selected using the CKS2~CKS0 bits in the SCC register. The high speed system clock can be sourced from the HIRC oscillator or the HXT oscillator, which is selected using the FHS bit in the SCC register.
  • Page 77 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Register Setting Operation LIRC Mode FHIDEN FSIDEN CKS2~CKS0 IDLE1 000~110 IDLE2 SLEEP “x”: don’t care Note: 1. The f clock will be switched on or off by configuring the corresponding oscillator enable bit in the SLOW mode.
  • Page 78 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Control Registers The registers, SCC, HIRCC, HXTC and LXTC, are used to control the system clock and the corresponding oscillator configurations. Register Name CKS2 CKS1 CKS0 — FHIDEN FSIDEN HIRCC — — — — HIRC1...
  • Page 79 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • HIRCC Register Name — — — — HIRC1 HIRC0 HIRCF HIRCEN — — — — — — — — Bit 7~4 Unimplemented, read as “0” Bit 3~2 HIRC1~HIRC0: HIRC frequency selection 00: 8MHz 01: 12MHz...
  • Page 80 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • LXTC Register Name — — — — — LXTSP LXTF LXTEN — — — — — — — — — — Bit 7~3 Unimplemented, read as “0” Bit 2 LXTSP: LXT Quick Start control 0: Disable –...
  • Page 81 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU FAST SLOW CPU run CPU run on/off SLEEP IDLE0 HALT instruction executed HALT instruction executed CPU stop CPU stop FHIDEN=0 FHIDEN=0 FSIDEN=0 FSIDEN=1 IDLE2 IDLE1 HALT instruction executed HALT instruction executed CPU stop CPU stop...
  • Page 82 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SLOW Mode to FAST Mode Switching In SLOW mode the system clock is derived from f . When system clock is switched back to the FAST mode from f , the CKS2~CKS0 bits should be set to “000”~“110” and then the system clock will respectively be switched to f /64.
  • Page 83 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • The Data Memory contents and registers will maintain their present condition. • The I/O ports will maintain their present conditions. • In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO, will be cleared.
  • Page 84 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Wake-up To minimise power consumption the device can enter the SLEEP or any IDLE Mode, where the CPU will be switched off. However, when the device is woken up again, it will take a considerable time for the original system oscillator to restart, stabilise and allow normal operation to resume.
  • Page 85 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • WDTC Register Name Bit 7~3 WE4~WE0: WDT function control 10101 or 01010: Enable Other values: Reset MCU When these bits are changed to any other values due to environmental noise the microcontroller will be reset; this reset operation will be activated after a delay time, , and the WRF bit in the RSTFC register will be set high.
  • Page 86 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Timer. The WDT function will be enabled if the WE4~WE0 bits are equal to 10101B or 01010B. If the WE4~WE0 bits are set to any other values, other than 01010B and 10101B, it will reset the device after a delay time, t .
  • Page 87 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Reset Functions There are several ways in which a microcontroller reset can occur, through events occurring internally. Power-on Reset The most fundamental and unavoidable reset is the one that occurs after power is first applied to the microcontroller.
  • Page 88 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 3 RSTF: Reset control register software reset flag 0: Not occurred 1: Occurred This bit is set high by the RSTC control register software reset and cleared to zero by the application program. Note that this bit can only be cleared to 0 by the application program.
  • Page 89 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Any register value, other than the four defined LVR values above, will also result in the generation of an MCU reset. The reset operation will be activated after a delay time, . However in this situation the register contents will be reset to the POR value.
  • Page 90 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Reset Initial Conditions The different types of reset described affect the reset flags in different ways. These flags, known as PDF and TO are located in the status register and are controlled by various microcontroller operations, such as the SLEEP or IDLE Mode function or Watchdog Timer.
  • Page 91 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU WDT Time-out WDT Time-out Register Power On Reset LVR Reset (Normal Operation) (IDLE/SLEEP) INTC0 ● ● ● - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0...
  • Page 92 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU WDT Time-out WDT Time-out Register Power On Reset LVR Reset (Normal Operation) (IDLE/SLEEP) SIMC0 ● ● ● 1 1 1 - 0 0 0 0 1 1 1 - 0 0 0 0 1 1 1 - 0 0 0 0...
  • Page 93 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU WDT Time-out WDT Time-out Register Power On Reset LVR Reset (Normal Operation) (IDLE/SLEEP) CTM1C0 ● ● ● 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
  • Page 94 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU WDT Time-out WDT Time-out Register Power On Reset LVR Reset (Normal Operation) (IDLE/SLEEP) TKM2C2 ● ● ● 1 1 1 0 0 1 0 0 1 1 1 0 0 1 0 0 1 1 1 0 0 1 0 0...
  • Page 95 “-” stands for unimplemented Input/Output Ports Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output designation of every pin fully under user program control, pull-high selections for all ports and wake-up selections on certain pins, the user is provided with an I/O structure to meet the needs of a wide range of application possibilities.
  • Page 96 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Register Name PAC7 PAC6 PAC5 PAC4 PAC3 PAC2 PAC1 PAC0 PAPU PAPU7 PAPU6 PAPU5 PAPU4 PAPU3 PAPU2 PAPU1 PAPU0 PAWU PAWU7 PAWU6 PAWU5 PAWU4 PAWU3 PAWU2 PAWU1 PAWU0 PBC7 PBC6 PBC5 PBC4 PBC3 PBC2 PBC1...
  • Page 97 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Pull-high Resistors Many product applications require pull-high resistors for their switch inputs usually requiring the use of an external resistor. To eliminate the need for these external resistors, all I/O pins, when configured as a digital input, have the capability of being connected to an internal pull-high resistor.
  • Page 98 CMOS output. Otherwise, these select bits have no effect. Users should refer to the Input/Output Characteristics section to obtain the exact value for different applications. • SLEDC Register – BS66F340C Name —...
  • Page 99 — PANS5 — — PANS2 PANS1 PANS0 PENS — — — — PENS3 PENS2 PENS1 PENS0 I/O Port Sink Current Selection Register List – BS66F340C Register Name PANS PANS7 PANS6 PANS5 — — — PANS1 — PENS PENS7 PENS6 —...
  • Page 100 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PANS Register – BS66F340C Name — — PANS5 — — PANS2 PANS1 PANS0 — — — — — — — — Bit 7~6 Unimplemented, read as “0” Bit 5 PANS5: PA5 sink current selection (NMOS adjust) 0: Sink current = Level 0 (Min.)
  • Page 101 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 2 PENS2: PE2 sink current selection (NMOS adjust) 0: Sink current = Level 0 (Min.) 1: Sink current = Level 1 (Max.) Bit 1 PENS1: PE1 sink current selection (NMOS adjust) 0: Sink current = Level 0 (Min.) 1: Sink current = Level 1 (Max.)
  • Page 102 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 5 PFNS5: PF5 sink current selection (NMOS adjust) 0: Sink current = Level 0 (Min.) 1: Sink current = Level 1 (Max.) Bit 4 PFNS4: PF4 sink current selection (NMOS adjust) 0: Sink current = Level 0 (Min.) 1: Sink current = Level 1 (Max.)
  • Page 103 PES07 PES06 PES05 PES04 PES03 PES02 PES01 PES00 PES1 — — — — PES13 PES12 PES11 PES10 Pin-shared Function Selection Register List – BS66F340C Register Name IFS0 — — IFS05 IFS04 IFS03 IFS02 IFS01 IFS00 IFS1 — — IFS15 IFS14...
  • Page 104 Bit 3~2 00: PB2 01: PB4 10: PB2 11: PB4 IFS01~IFS00: STPI input source pin selection Bit 1~0 00: PE2 01: PE3 10: PE2 11: PE3 • IFS1 Register – BS66F340C Name — — IFS15 IFS14 IFS13 IFS12 IFS11 IFS10 —...
  • Page 105 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 1~0 IFS11~ IFS10: RX input source pin selection 00: PB3 01: PB3 10: PA1 11: PA1 • IFS1 Register – BS66F350C Name — — IFS15 IFS14 IFS13 IFS12 IFS11 IFS10 — — — —...
  • Page 106 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PAS0 Register – BS66F340C Name PAS07 PAS06 PAS05 PAS04 PAS03 PAS02 PAS01 PAS00 Bit 7~6 PAS07~PAS06: PA3 Pin-Shared function selection 00: PA3 01: SCS 10: XT1 11: PA3 Bit 5~4 PAS05~PAS04: PA2 Pin-Shared function selection...
  • Page 107 PAS03~PAS02: PA1 Pin-Shared function selection 00: PA1 01: CTP0 10: PA1 11: PA1 PAS01~PAS00: PA0 Pin-Shared function selection Bit 1~0 00: PA0 01: SDO 10: PA0 11: PA0 • PAS1 Register – BS66F340C Name PAS17 PAS16 — — PAS13 PAS12 PAS11 PAS10 —...
  • Page 108 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PAS1 Register – BS66F350C Name PAS17 PAS16 PAS15 PAS14 PAS13 PAS12 PAS11 PAS10 Bit 7~6 PAS17~PAS16: PA7 Pin-Shared function selection 00: PA7 01: PA7 10: TX 11: SDI/SDA Bit 5~4 PAS15~PAS14: PA6 Pin-Shared function selection...
  • Page 109 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PBS0 Register Name PBS07 PBS06 PBS05 PBS04 PBS03 PBS02 PBS01 PBS00 Bit 7~6 PBS07~PBS06: PB3 Pin-Shared function selection 00: PB3 01: RX 10: PB3 11: AN3 Bit 5~4 PBS05~PBS04: PB2 Pin-Shared function selection 00: PB2/PTPI...
  • Page 110 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PCS0 Register Name PCS07 PCS06 PCS05 PCS04 PCS03 PCS02 PCS01 PCS00 Bit 7~6 PCS07~PCS06: PC3 Pin-Shared function selection 00: PC3 01: PC3 10: KEY8 11: PC3 Bit 5~4 PCS05~PCS04: PC2 Pin-Shared function selection 00: PC2...
  • Page 111 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PDS0 Register – BS66F350C/BS66F360C Name PDS07 PDS06 PDS05 PDS04 PDS03 PDS02 PDS01 PDS00 Bit 7~6 PDS07~PDS06: PD3 Pin-Shared function selection 00: PD3 01: PD3 10: KEY16 11: PD3 Bit 5~4 PDS05~PDS04: PD2 Pin-Shared function selection...
  • Page 112 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PES0 Register – BS66F340C Name PES07 PES06 PES05 PES04 PES03 PES02 PES01 PES00 Bit 7~6 PES07~PES06: PE3 Pin-Shared function selection 00: PE3/STPI 01: STPB 10: KEY12 11: PE3/STPI Bit 5~4 PES05~PES04: PE2 Pin-Shared function selection...
  • Page 113 PES03~PES02: PE1 Pin-Shared function selection 00: PE1 01: PE1 10: KEY22 11: PE1 PES01~PES00: PE0 Pin-Shared function selection Bit 1~0 00: PE0 01: PE0 10: KEY21 11: PE0 • PES1 Register – BS66F340C Name — — — — PES13 PES12 PES11 PES10 —...
  • Page 114 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PES1 Register – BS66F350C Name PES17 PES16 PES15 PES14 PES13 PES12 PES11 PES10 Bit 7~6 PES17~PES16: PE7 Pin-Shared function selection 00: PE7 01: CTP1B 10: PE7 11: PE7 Bit 5~4 PES15~PES14: PE6 Pin-Shared function selection...
  • Page 115 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PFS0 Register – BS66F360C Name PFS07 PFS06 PFS05 PFS04 PFS03 PFS02 PFS01 PFS00 Bit 7~6 PFS07~PFS06: PF3 Pin-Shared function selection 00: PF3 01: TX 10: SDI/SDA 11: PF3 Bit 5~4 PFS05~PFS04: PF2 Pin-Shared function selection...
  • Page 116 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU I/O Pin Structures The accompanying diagram illustrates the internal structure of some generic I/O logic function. As the exact logical construction of the I/O pin will differ from this drawing, it is supplied as a guide only to assist with the functional understanding of the I/O logic function.
  • Page 117 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Timer Modules – TM One of the most fundamental functions in any microcontroller devices is the ability to control and measure time. To implement time related functions these devices include several Timer Modules, abbreviated to the name TM. The TMs are multi-purpose timing units and serve to provide operations such as Timer/Counter, Input Capture, Compare Match Output and Single Pulse Output as well as being the functional unit for the generation of PWM signals.
  • Page 118 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU TM Interrupts The Compact, Standard or Periodic type TM has two internal interrupts, one for each of the internal comparator A or comparator P, which generate a TM interrupt when a compare match condition occurs. When a TM interrupt is generated it can be used to clear the counter and also to change the state of the TM output pin.
  • Page 119 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Clock input STCK CCR capture input STPI CCR output STPB STM Function Pin Block Diagram Clock/capture input PTCK CCR capture input PTPI CCR output PTPB PTM Function Pin Block Diagram Programming Considerations The TM Counter registers and the Capture/Compare CCRA and CCRP registers, all have a low and high byte structure.
  • Page 120 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The following steps show the read and write procedures: • Writing Data to CCRA or CCRP Step 1. Write data to Low Byte xTMnAL or PTMRPL ♦ – note that here data is only written to the 8-bit buffer.
  • Page 121 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU CCRP is three bits wide whose value is compared with the highest three bits in the counter while the CCRA is the ten bits and therefore compares with all counter bits. The only way of changing the value of the 10-bit counter using the application program, is to clear the counter by changing the CTnON bit from low to high.
  • Page 122 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 3 CTnON: CTMn Counter On/Off Control 0: Off 1: On This bit controls the overall on/off function of the CTMn. Setting the bit high enables the counter to run, clearing the bit to 0 disables the CTMn. Clearing this bit to zero will stop the counter from counting and turn off the CTMn which will reduce its power consumption.
  • Page 123 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Timer/Counter Mode Unused These two bits are used to determine how the CTMn output pin changes state when a certain condition is reached. The function that these bits select depends upon in which mode the CTMn is running.
  • Page 124 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • CTMnDL Register Name Bit 7~0 D7~D0: CTMn Counter Low Byte Register bit 7 ~ bit 0 CTMn 10-bit Counter bit 7 ~ bit 0 • CTMnDH Register Name — — — — — —...
  • Page 125 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Compact Type TM Operating Modes The Compact Type TM can operate in one of three operating modes, Compare Match Output Mode, PWM Output Mode or Timer/Counter Mode. The operating mode is selected using the CTnM1 and CTnM0 bits in the CTMnC1 register.
  • Page 126 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter overflow Counter Value CTnCCLR = 0; CTnM [1:0] = 00 CCRP > 0 CCRP=0 Counter cleared by CCRP value 0x3FF CCRP > 0 Counter Resume Restart CCRP Pause Stop CCRA Time CTnON CTnPAU CTnPOL CCRP Int.
  • Page 127 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value CTnCCLR = 1; CTnM [1:0] = 00 CCRA = 0 CCRA > 0 Counter cleared by CCRA value Counter overflow 0x3FF CCRA=0 Resume CCRA Pause Stop Counter Restart CCRP Time CTnON CTnPAU CTnPOL...
  • Page 128 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Timer/Counter Mode To select this mode, bits CTnM1 and CTnM0 in the CTMnC1 register should be set to 11 respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags. The exception is that in the Timer/Counter Mode the CTMn output pin is not used.
  • Page 129 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value CTnDPX = 0; CTnM [1:0] = 10 Counter cleared by CCRP Counter Reset when CTnON returns high CCRP Counter Stop if Pause Resume CTnON bit low CCRA Time CTnON CTnPAU CTnPOL CCRA Int.
  • Page 130 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value CTnDPX = 1; CTnM [1:0] = 10 Counter cleared by CCRA Counter Reset when CTnON returns high CCRA Counter Stop if Pause Resume CTnON bit low CCRP Time CTnON CTnPAU CTnPOL CCRP Int.
  • Page 131 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Standard Type TM – STM The Standard Type TM contains five operating modes, which are Compare Match Output, Timer/Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Standard TM can also be controlled with two external input pins and can drive two external output pins.
  • Page 132 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Register Name STMC0 STPAU STCK2 STCK1 STCK0 STON — — — STMC1 STM1 STM0 STIO1 STIO0 STOC STPOL STDPX STCCLR STMDL STMDH STMAL STMAH STMRP 16-bit Standard Type TM Register List • STMC0 Register Name...
  • Page 133 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • STMC1 Register Name STM1 STM0 STIO1 STIO0 STOC STPOL STDPX STCCLR Bit 7~6 STM1~STM0: Select STM Operating Mode 00: Compare Match Output Mode 01: Capture Input Mode 10: PWM Output Mode or Single Pulse Output Mode 11: Timer/Counter Mode These bits setup the required operating mode for the STM.
  • Page 134 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU PWM Output Mode/Single Pulse Output Mode 0: Active low 1: Active high This is the output control bit for the STM output pin. Its operation depends upon whether STM is being used in the Compare Match Output Mode or in the PWM Output Mode/Single Pulse Output Mode.
  • Page 135 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • STMAL Register Name Bit 7~0 D7~D0: STM CCRA Low Byte Register bit 7 ~ bit 0 STM 16-bit CCRA bit 7 ~ bit 0 • STMAH Register Name Bit 7~0 D15~D8: STM CCRA High Byte Register bit 7 ~ bit 0 STM 16-bit CCRA bit 15 ~ bit 8 •...
  • Page 136 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Standard Type TM Operation Modes The Standard Type TM can operate in one of five operating modes, Compare Match Output Mode, PWM Output Mode, Single Pulse Output Mode, Capture Input Mode or Timer/Counter Mode. The operating mode is selected using the STM1 and STM0 bits in the STMC1 register.
  • Page 137 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter overflow Counter Value STCCLR = 0; STM [1:0] = 00 CCRP > 0 CCRP=0 Counter cleared by CCRP value 0xFFFF CCRP > 0 Counter Resume Restart CCRP Pause Stop CCRA Time STON STPAU STPOL CCRP Int.
  • Page 138 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value STCCLR = 1; STM [1:0] = 00 CCRA = 0 CCRA > 0 Counter cleared by CCRA value Counter overflow 0xFFFF CCRA=0 Resume CCRA Pause Stop Counter Restart CCRP Time STON STPAU STPOL...
  • Page 139 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Timer/Counter Mode To select this mode, bits STM1 and STM0 in the STMC1 register should be set to 11 respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags. The exception is that in the Timer/Counter Mode the STM output pin is not used.
  • Page 140 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value STDPX = 0; STM [1:0] = 10 Counter cleared by CCRP Counter Reset when STON returns high CCRP Counter Stop if Pause Resume STON bit low CCRA Time STON STPAU STPOL CCRA Int.
  • Page 141 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value STDPX = 1; STM [1:0] = 10 Counter cleared by CCRA Counter Reset when STON returns high CCRA Counter Stop if Pause Resume STON bit low CCRP Time STON STPAU STPOL CCRP Int.
  • Page 142 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Single Pulse Output Mode To select this mode, bits STM1 and STM0 in the STMC1 register should be set to 10 respectively and also the STIO1 and STIO0 bits should be set to 11 respectively. The Single Pulse Output Mode, as the name suggests, will generate a single shot pulse on the STM output pin.
  • Page 143 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value STM [1:0] = 10 ; STIO [1:0] = 11 Counter stopped by CCRA Counter Reset when STON returns high CCRA Counter Stops by Resume Pause software CCRP Time STON Auto. set by STCK pin...
  • Page 144 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Capture Input Mode To select this mode bits STM1 and STM0 in the STMC1 register should be set to 01 respectively. This mode enables external signals to capture and store the present value of the internal counter and can therefore be used for applications such as pulse width measurements.
  • Page 145 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value STM [1:0] = 01 Counter cleared by CCRP Counter Counter Stop Reset CCRP Resume Pause Time STON STPAU Active Active Active edge edge edge STM capture pin STPI CCRA Int. Flag STMAF CCRP Int.
  • Page 146 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Periodic Type TM – PTM The Periodic Type TM contains five operating modes, which are Compare Match Output, Timer/Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Periodic TM can be controlled with two external input pins and can drive two external output pins.
  • Page 147 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Register Name PTMC0 PTPAU PTCK2 PTCK1 PTCK0 PTON — — — PTMC1 PTM1 PTM0 PTIO1 PTIO0 PTOC PTPOL PTCAPTS PTCCLR PTMDL PTMDH — — — — — — PTMAL PTMAH — — — — —...
  • Page 148 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PTMC1 Register Name PTM1 PTM0 PTIO1 PTIO0 PTOC PTPOL PTCAPTS PTCCLR Bit 7~6 PTM1~PTM0: Select PTM Operating Mode 00: Compare Match Output Mode 01: Capture Input Mode 10: PWM Output Mode or Single Pulse Output Mode 11: Timer/Counter Mode These bits setup the required operating mode for the PTM.
  • Page 149 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 3 PTOC: PTM PTP Output control bit Compare Match Output Mode 0: Initial low 1: Initial high PWM Output Mode/Single Pulse Output Mode 0: Active low 1: Active high This is the output control bit for the PTM output pin. Its operation depends upon whether PTM is being used in the Compare Match Output Mode or in the PWM Output Mode/Single Pulse Output Mode.
  • Page 150 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • PTMAL Register Name Bit 7~0 D7~D0: PTM CCRA Low Byte Register bit 7 ~ bit 0 PTM 10-bit CCRA bit 7 ~ bit 0 • PTMAH Register Name — — — — — —...
  • Page 151 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Periodic Type TM Operating Modes The Periodic Type TM can operate in one of five operating modes, Compare Match Output Mode, PWM Output Mode, Single Pulse Output Mode, Capture Input Mode or Timer/Counter Mode. The operating mode is selected using the PTM1 and PTM0 bits in the PTMC1 register.
  • Page 152 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter overflow Counter Value PTCCLR = 0; PTM [1:0] = 00 CCRP > 0 CCRP=0 Counter cleared by CCRP value 0x3FF CCRP > 0 Counter Resume Restart CCRP Pause Stop CCRA Time PTON PTPAU PTPOL CCRP Int.
  • Page 153 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value PTCCLR = 1; PTM [1:0] = 00 CCRA = 0 CCRA > 0 Counter cleared by CCRA value Counter overflow 0x3FF CCRA=0 Resume CCRA Pause Stop Counter Restart CCRP Time PTON PTPAU PTPOL...
  • Page 154 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Timer/Counter Mode To select this mode, bits PTM1 and PTM0 in the PTMC1 register should be set to 11 respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags. The exception is that in the Timer/Counter Mode the PTM output pin is not used.
  • Page 155 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value PTM [1:0] = 10 Counter cleared by CCRP Counter Reset when PTON returns high CCRP Counter Stop if Pause Resume PTON bit low CCRA Time PTON PTPAU PTPOL CCRA Int. Flag PTMAF CCRP Int.
  • Page 156 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Single Pulse Output Mode To select this mode, bits PTM1 and PTM0 in the PTMC1 register should be set to 10 respectively and also the PTIO1 and PTIO0 bits should be set to 11 respectively. The Single Pulse Output Mode, as the name suggests, will generate a single shot pulse on the PTM output pin.
  • Page 157 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value PTM [1:0] = 10; PTIO [1:0] = 11 Counter stopped by CCRA Counter Reset when PTON returns high CCRA Counter Stops by Resume Pause software CCRP Time PTON Auto. set by PTCK pin...
  • Page 158 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Capture Input Mode To select this mode bits PTM1 and PTM0 in the PTMC1 register should be set to 01 respectively. This mode enables external signals to capture and store the present value of the internal counter and can therefore be used for applications such as pulse width measurements.
  • Page 159 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Counter Value PTM [1:0] = 01 Counter cleared by CCRP Counter Counter Stop Reset CCRP Resume Pause Time PTON PTPAU Active Active Active edge edge edge PTM Capture pin PTPI or PTCK CCRA Int. Flag PTMAF CCRP Int.
  • Page 160 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Analog to Digital Converter The need to interface to real world analog signals is a common requirement for many electronic systems. However, to properly process these signals by a microcontroller, they must first be converted into digital signals by A/D converters. By integrating the A/D conversion electronic circuitry into the microcontroller, the need for external components is reduced significantly with the corresponding follow-on benefits of lower costs and reduced component space requirements.
  • Page 161 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU A/D Converter Register Description Overall operation of the A/D converter is controlled using four registers. A read only register pair exists to store the A/D Converter data 12-bit value. The remaining two registers, SADC0 and SADC1, are control registers which set the operating conditions and control function of the A/D converter.
  • Page 162 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • SADC0 Register Name START ADBZ ADCEN ADRFS SACS3 SACS2 SACS1 SACS0 Bit 7 START: Start the A/D conversion 0→1→0: Start This bit is used to initiate an A/D conversion process. The bit is normally low but if set high and then cleared low again, the A/D converter will initiate a conversion process.
  • Page 163 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU setting the SACS bit field with a value of “1000~1111”. Otherwise, the external channel input will be connected together with the internal analog signal. This will result in unpredictable situations such as an irreversible damage.
  • Page 164 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The A/D converter also has one internal analog input option, which is the bandgap reference voltage, V . The internal analog input signal is selected by setting the SAINS2~SAINS0 bits. If the SAINS2~SAINS0 bits are set to any value of “000” and “101~111”, the external channel input will be selected to be converted and the SACS3~SACS0 bits can determine which external channel is selected.
  • Page 165 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU A/D Clock Period (t ADCK SACKS[2:0] SACKS[2:0] SACKS[2:0] SACKS[2:0] SACKS[2:0] SACKS[2:0] SACKS[2:0] SACKS[2:0] = 000 = 001 = 010 = 011 = 100 = 101 = 110 = 111 /16) /32) /64) /128) 1MHz 1μs 2μs...
  • Page 166 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Summary of A/D Conversion Steps The following summarises the individual steps that should be executed in order to implement an A/D conversion process. • Step 1 Select the required A/D conversion clock by properly programming the SACKS2~SACKS0 bits in the SADC1 register.
  • Page 167 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Programming Considerations During microcontroller operations where the A/D converter is not being used, the A/D internal circuitry can be switched off to reduce power consumption, by clearing bit ADCEN to zero in the SADC0 register. When this happens, the internal A/D converter circuits will not consume power irrespective of what analog voltage is applied to their input lines.
  • Page 168 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU mov PBS0,a ; set PBS0 to configure pin VREF and pin AN1 mov a,21h mov SADC0,a ; enable the A/D converter and connect AN1 channel to A/D converter start_conversion: clr START ; high pulse on start bit to initiate conversion set START ; reset A/D clr START ; start A/D polling_EOC: sz ADBZ ; poll the SADC0 register ADBZ bit to detect end of A/D conversion jmp polling_EOC ; continue polling mov a,SADOL ; read low byte conversion result value mov SADOL_buffer,a ; save result to user defined register mov a,SADOH ; read high byte conversion result value mov SADOH_buffer,a ; save result to user defined register jmp start_conversion ; start next A/D conversion...
  • Page 169 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Serial Interface Module – SIM These devices contain a Serial Interface Module, which includes both the four line SPI interface and the two line I C interface types, to allow an easy method of communication with external peripheral hardware.
  • Page 170 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • Transmission complete flag • Rising or falling active clock edge The status of the SPI interface pins is determined by a number of factors such as whether the device is in the master or slave mode and upon the condition of certain control bits such as CSEN and SIMEN.
  • Page 171 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SPI Control Registers There are also two control registers for the SPI interface, SIMC0 and SIMC2. Note that the SIMC2 register also has the name SIMA which is used by the I C function. The SIMC0 register is used to control the enable/disable function and to set the data transmission clock frequency.
  • Page 172 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • SIMC2 Register Name CKPOLB CKEG CSEN WCOL Bit 7~6 D7~D6: Undefined bits These bits can be read or written by the application program. Bit 5 CKPOLB: SPI clock line base condition selection 0: The SCK line will be high when the clock is inactive...
  • Page 173 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SPI Communication After the SPI interface is enabled by setting the SIMEN bit high, then in the Master Mode, when data is written to the SIMD register, transmission/reception will begin simultaneously. When the data transfer is completed, the TRF flag will be set automatically, but must be cleared using the application program.
  • Page 174 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SCK (CKPOLB=1) SCK (CKPOLB=0) D7/D0 D6/D1 D5/D2 D4/D3 D3/D4 D2/D5 D1/D6 D0/D7 SDI Data Capture Write to SIMD (SDO changes as soon as writing occurs; SDO is floating if SCS=1) Note: For SPI slave mode, if SIMEN=1 and CSEN=0, SPI is always enabled and ignores the SCS level.
  • Page 175 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SPI Bus Enable/Disable To enable the SPI bus, set CSEN=1 and SCS=0, then wait for data to be written into the SIMD (TXRX buffer) register. For the Master Mode, after data has been written to the SIMD (TXRX buffer) register, then transmission or reception will start automatically.
  • Page 176 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • Step 8 Clear TRF. • Step 9 Go to step 4. Slave Mode • Step 1 Select the SPI Slave mode using the SIM2~SIM0 bits in the SIMC0 control register • Step 2 Setup the CSEN bit and setup the MLS bit to choose if the data is MSB or LSB first, this setting must be the same with the Master devices.
  • Page 177 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU C Interface Operation The I C serial interface is a two line interface, a serial data line, SDA, and serial clock line, SCL. As many devices may be connected together on the same bus, their outputs are both open drain types.
  • Page 178 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The SIMDEB1 and SIMDEB0 bits determine the debounce time of the I C interface. This uses the internal clock to in effect add a debounce time to the external clock to reduce the possibility of glitches on the clock line causing erroneous operation. The debounce time, if selected, can be chosen to be either 2 or 4 system clocks.
  • Page 179 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • SIMA Register Name SIMA6 SIMA5 SIMA4 SIMA3 SIMA2 SIMA1 SIMA0 Bit 7~1 SIMA6~SIMA0: I C slave address SIMA6~SIMA0 is the 7-bit I C slave address. Bit 0 D0: Reserved bit, can be read or written by application program...
  • Page 180 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU changes from low to high and should therefore be first initialised by the application program. If the SIM is configured to operate as an I C interface via the SIM2~SIM0 bits and the SIMEN bit changes from low to high, the contents of the I...
  • Page 181 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 1 IAMWU: I C Address Match Wake-up control 0: Disable 1: Enable This bit should be set to 1 to enable the I C address match wake up from the SLEEP or IDLE Mode. If the IAMWU bit has been set before entering either the SLEEP or...
  • Page 182 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Start Set SIM[2:0]=110 Set SIMEN Write Slave Address to SIMA C Bus Interrupt=? CLR SIME SET SIME Poll SIMF to decide Wait for Interrupt when to go to I C Bus ISR Go to Main Program...
  • Page 183 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU C Bus Slave Address Acknowledge Signal After the master has transmitted a calling address, any slave device on the I C bus, whose own internal address matches the calling address, must generate an acknowledge signal. The acknowledge signal will inform the master that a slave device has accepted its calling address.
  • Page 184 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Start SIMTOF=1? SET SIMTOEN HAAS=1? CLR SIMTOF HTX=1? SRW=1? RETI Read from SIMD to CLR HTX release SCL Line SET HTX CLR TXAK RETI Dummy read from SIMD Write data to SIMD to to release SCL Line...
  • Page 185 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU When an I C time-out counter overflow occurs, the counter will stop and the SIMTOEN bit will be cleared to zero and the SIMTOF bit will be set high to indicate that a time-out condition has occurred.
  • Page 186 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • RX pin wake-up function • Transmit and receive interrupts • Interrupts can be triggered by the following conditions: Transmitter Empty ♦ Transmitter Idle ♦ Receiver Full ♦ Receiver Overrun ♦ Address Mode Detect ♦...
  • Page 187 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU UART Status and Control Registers There are five control registers associated with the UART function. The USR, UCR1 and UCR2 registers control the overall function of the UART, while the BRG register controls the Baud rate. The actual data to be transmitted and received on the serial interface is managed through the TXR_RXR data register.
  • Page 188 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The OERR flag is the overrun error flag which indicates when the receiver buffer has overflowed. When this read only flag is “0”, it indicates that there is no overrun error. When the flag is “1”, it indicates that an overrun error occurs which will inhibit further transfers to the TXR_RXR receive data register.
  • Page 189 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • UCR1 Register The UCR1 register together with the UCR2 register are the two UART control registers that are used to set the various options for the UART function, such as overall on/off control, parity control, data transfer bit length etc.
  • Page 190 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU transmit break characters and the transmitter will send logic zeros. When this bit is equal to “1”, after the buffered data has been transmitted, the transmitter output is held low for a minimum of a 13-bit length and until the TXBRK bit is reset.
  • Page 191 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The bit named ADDEN is the address detect function enable control bit. When this bit is equal to “1”, the address detect function is enabled. When it occurs, if the 8th bit, which corresponds to RX7 if BNO=0 or the 9th bit, which corresponds to RX8 if BNO=1, has a value of “1”, then the received word will be identified as an address,...
  • Page 192 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • BRG Register Name “x”: unknown D7~D0: Baud Rate values Bit 7~0 By programming the BRGH bit in UCR2 Register which allows selection of the related formula described above and programming the required value in the BRG register, the required baud rate can be set.
  • Page 193 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU UART Setup and Control For data transfer, the UART function utilizes a non-return-to-zero, more commonly known as NRZ, format. This is composed of one start bit, eight or nine data bits, and one or two stop bits. Parity is supported by the UART hardware, and can be set to be even, odd or no parity.
  • Page 194 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The following diagram shows the transmit and receive waveforms for both 8-bit and 9-bit data formats. Parity Bit Next Start Start Stop Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6...
  • Page 195 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The read-only TXIF flag is set by the UART hardware and if set indicates that the TXR_RXR register is empty and that other data can now be written into the TXR_RXR register without overwriting the previous data. If the TEIE bit is set then the TXIF flag will generate an interrupt.
  • Page 196 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • Configure the BRG register to select the desired baud rate. • Set the RXEN bit to ensure that the RX pin is used as a UART receiver pin. At this point the receiver will be enabled which will begin to look for a start bit.
  • Page 197 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Overrun Error – OERR The TXR_RXR register is composed of a two byte deep FIFO data buffer, where two bytes can be held in the FIFO register, while a third byte can continue to be received. Before this third byte has been entirely shifted in, the data should be read from the TXR_RXR register.
  • Page 198 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU The address detect condition, which is also a UART interrupt source, does not have an associated flag, but will generate a UART interrupt when an address detect condition occurs if its function is enabled by setting the ADDEN bit in the UCR2 register. An RX pin wake-up, which is also a UART...
  • Page 199 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 9 if BNO=1, UART Interrupt ADDEN Bit 8 if BNO=0 Generated √ √ × √ ADDEN Bit Function UART Power Down and Wake-up When the UART clock (f ) is off, the UART will cease to function, and all clock sources to the module are shutdown.
  • Page 200 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Device Total Key Number Touch Key Module Shared I/O Pin KEY1~KEY4 BS66F340C KEY5~KEY8 KEY9~KEY12 KEY1~KEY4 KEY5~KEY8 BS66F350C KEY9~KEY12 KEY13~KEY16 KEY17~KEY20 KEY1~KEY4 KEY5~KEY8 KEY9~KEY12 BS66F360C KEY13~KEY16 KEY17~KEY20 KEY21~KEY24 KEY25~KEY28 Touch Key Structure Touch Key Register Definition Each touch key module, which contains four touch key functions, has its own suite registers.
  • Page 201 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Register Name TKMnC0 — — MnDFEN MnFILEN MnSOFC MnSOF2 MnSOF1 MnSOF0 TKMnC1 MnTSS — MnROEN MnKOEN MnK4EN MnK3EN MnK2EN MnK1EN TKMnC2 MnSK31 MnSK30 MnSK21 MnSK20 MnSK11 MnSK10 MnSK01 MnSK00 Touch Key Function Register List • TKTMR Register...
  • Page 202 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU keys and reference oscillators will automatically stop. All touch key module 16-bit C/F counter, touch key function 16-bit counter, 5-bit time slot unit period counter and 8-bit time slot counter will be automatically switched off.
  • Page 203 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • TKC1 Register Name TSCS TK16S1 TK16S0 TKFS1 TKFS0 Bit 7~5 D7~D5: Data bits for test only These bits are used for test purpose only and must be kept as “000” for normal operations. Bit 4...
  • Page 204 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • TKMnROH/TKMnROL – Touch Key Module n Reference Oscillator Capacitor Selection Register Pair Register TKMnROH TKMnROL Name — — — — — — — — — — — — R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W —...
  • Page 205 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • TKMnC1 Register Name MnTSS — MnROEN MnKOEN MnK4EN MnK3EN MnK2EN MnK1EN — — Bit 7 MnTSS: Touch key module n time slot counter clock source select 0: Touch key module n reference oscillator 1: f Bit 6 Unimplemented, read as “0”...
  • Page 206 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 0 MnK1EN: Touch key module n KEY1 enable control Touch Key Module n – Mn MnK1EN 0: Disable I/O or other functions 1: Enable KEY1 KEY5 KEY9 KEY13 KEY17 KEY21 KEY25 • TKMnC2 Register...
  • Page 207 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU During this reference clock fixed interval, the number of clock cycles generated by the sense oscillator is measured, and it is this value that is used to determine if a touch action has been made or not.
  • Page 208 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Auto Scan Mode Two scan modes, the auto scan mode and the manual scan mode are contained for the touch key function and are selected using the TKMOD bit in the TKC0 register. The auto scan mode can minisize the load of the application program and improve the touch key scan operation performance.
  • Page 209 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU the dedicated touch key data memory and loaded into the corresponding TKMnROH/TKMnROL registers. Then the 16-bit C/F counter value will be written into the corresponding location of the last time slot 3 scanned key in the touch key data memory. After this, the selected key will start to be scanned in time slot 0.
  • Page 210 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Touch Key Scan Operation Flowchart Start Write Ref. OSC Capacitor to TKMnROH/TKMnROL Touch Key Manual Scan Operation Start Set Start bit TKST 0 Busy flag TKBUSY=1 Initiate Time Slot & 16-bit C/F Counter All Time Slot &...
  • Page 211 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Start Write Ref. OSC internal Capacitor value to Data Memory (Sector 6 ) Touch Key Auto Scan Operation Start Set Start bit TKST 0 Busy flag TKBUSY=1 Load Ref. OSC internal Capacitor value from Data Memory (Sector 6 )
  • Page 212 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Touch Key Interrupts The touch key has one interrupt, when the touch key module time slot counter overflows in manual mode or all the touch key scan operation is complete in auto scan mode, an actual touch key interrupt will take place.
  • Page 213 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 5 LVDO: LVD Detection Output Flag 0: No Low Voltage Detected 1: Low Voltage Detected Bit 4 LVDEN: Low Voltage Detector Control 0: Disable 1: Enable Bit 3 VBGEN: Bandgap Buffer Control 0: Disable...
  • Page 214 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Interrupts Interrupts are an important part of any microcontroller system. When an external event or an internal function such as a Timer Module or an A/D converter requires microcontroller attention, their corresponding interrupt will enforce a temporary suspension of the main program allowing the microcontroller to direct attention to their respective needs.
  • Page 215 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Register Name INTEG — — — — INT1S1 INT1S0 INT0S1 INT0S0 INTC0 — TKMF INT1F INT0F TKME INT1E INT0E INTC1 MF1F MF0F MF1E MF0E INTC2 MF3F TB1F TB0F MF2F MF3E TB1E TB0E MF2E MFI0 —...
  • Page 216 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 1 INT0E: INT0 interrupt control 0: Disable 1: Enable Bit 0 EMI: Global interrupt control 0: Disable 1: Enable • INTC1 Register Name MF1F MF0F MF1E MF0E Bit 7 ADF: A/D Converter interrupt request flag...
  • Page 217 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 4 MF2F: Multi-function interrupt 2 request flag 0: No request 1: Interrupt request Bit 3 MF3E: Multi-function interrupt 3 control 0: Disable 1: Enable Bit 2 TB1E: Time Base 1 interrupt control 0: Disable...
  • Page 218 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 4 CTM1PF: CTM1 Comparator P match Interrupt request flag 0: No request 1: Interrupt request Bit 3 STMAE: STM Comparator A match Interrupt control 0: Disable 1: Enable Bit 2 STMPE: STM Comparator P match Interrupt control...
  • Page 219 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Bit 4 LVF: LVD Interrupt request flag 0: No request 1: Interrupt request Bit 3~2 Unimplemented, read as “0” Bit 1 DEE: Data EEPROM Interrupt control 0: Disable 1: Enable Bit 0 LVE: LVD Interrupt control...
  • Page 220 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Legend EMI auto disabled in ISR Request Flag, no auto reset in ISR Request Flag, auto reset in ISR Interrupt Request Enable Master Priority Vector Name Flags Bits Enable Enable Bits High INT0 Pin INT0F...
  • Page 221 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Touch Key Interrupt A Touch Key Interrupt request will take place when the Touch Key Interrupt request flag, TKMF, is set, which occurs when the touch key time slot counter overflows in manual mode or all the touch keys auto scan operations finish.
  • Page 222 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU TB0ON Time Base 0 Interrupt PSC0 PSC0 PSC0 Prescaler 0 TB0[2:0] CLKSEL0[1:0] PSC1 PSC1 PSC1 Prescaler 1 Time Base 1 Interrupt TB1ON CLKSEL1[1:0] TB1[2:0] Time Base Interrupts • PSC0R Register Name — — — —...
  • Page 223 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU • TB1C Register Name TB1ON — — — — TB12 TB11 TB10 — — — — — — — — Bit 7 TB1ON: Time Base 1 Control 0: Disable 1: Enable Bit 6~3 Unimplemented, read as “0”...
  • Page 224 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Serial Interface Module Interrupt The Serial Interface Module Interrupt, as known as the SIM Interrupt, is contained whin the Multi-function Interrupt. A SIM Interrupt request will take place when the SIM Interrupt request flag, SIMF, is set, which occurs when a byte of data has been received or transmitted by the SIM...
  • Page 225 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Programming Considerations By disabling the relevant interrupt enable bits, a requested interrupt can be prevented from being serviced, however, once an interrupt request flag is set, it will remain in this condition in the interrupt register until the corresponding interrupt is serviced or until the request flag is cleared by the application program.
  • Page 226 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Configuration Options Configuration options refer to certain options within the MCU that are programmed into the device during the programming process. During the development process, these options are selected using the HT-IDE software development tools. The option must be defined for proper system function, the details of which are shown in the table.
  • Page 227 In the case of Holtek microcontroller, a comprehensive and flexible set of over 60 instructions is provided to enable programmers to implement their application with the minimum of programming overheads.
  • Page 228 The standard logical operations such as AND, OR, XOR and CPL all have their own instruction within the Holtek microcontroller instruction set. As with the case of most instructions involving data manipulation, data must pass through the Accumulator which may involve additional programming steps.
  • Page 229 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Instruction Set Summary The instructions related to the data memory access in the following table can be used when the desired data memory is located in Data Memory sector 0. Table Conventions x: Bits immediate data...
  • Page 230 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Mnemonic Description Cycles Flag Affected Data Move MOV A,[m] Move Data Memory to ACC None MOV [m],A Move ACC to Data Memory Note None MOV A,x Move immediate data to ACC None Bit Operation CLR [m].i...
  • Page 231 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Extended Instruction Set The extended instructions are used to support the full range address access for the data memory. When the accessed data memory is located in any data memory sector except sector 0, the extended instruction can be used to directly access the data memory instead of using the indirect addressing access.
  • Page 232 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Mnemonic Description Cycles Flag Affected Branch LSZ [m] Skip if Data Memory is zero Note None LSZA [m] Skip if Data Memory is zero with data movement to ACC Note None LSNZ [m] Skip if Data Memory is not zero...
  • Page 233 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Instruction Definition ADC A,[m] Add Data Memory to ACC with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added. The result is stored in the Accumulator. Operation ACC ← ACC + [m] + C...
  • Page 234 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU ANDM A,[m] Logical AND ACC to Data Memory Description Data in the specified Data Memory and the Accumulator perform a bitwise logical AND operation. The result is stored in the Data Memory. Operation [m] ← ACC “AND” [m]...
  • Page 235 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU DAA [m] Decimal-Adjust ACC for addition with result in Data Memory Description Convert the contents of the Accumulator value to a BCD (Binary Coded Decimal) value resulting from the previous addition of two BCD variables. If the low nibble is greater than 9 or if AC flag is set, then a value of 6 will be added to the low nibble.
  • Page 236 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU JMP addr Jump unconditionally Description The contents of the Program Counter are replaced with the specified address. Program execution then continues from this new address. As this requires the insertion of a dummy instruction while the new address is loaded, it is a two cycle instruction.
  • Page 237 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Return from subroutine Description The Program Counter is restored from the stack. Program execution continues at the restored address. Operation Program Counter ← Stack Affected flag(s) None RET A,x Return from subroutine and load immediate data to ACC...
  • Page 238 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU RLCA [m] Rotate Data Memory left through Carry with result in ACC Description Data in the specified Data Memory and the carry flag are rotated left by 1 bit. Bit 7 replaces the Carry bit and the original carry flag is rotated into the bit 0. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged.
  • Page 239 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SBC A, x Subtract immediate data from ACC with Carry Description The immediate data and the complement of the carry flag are subtracted from the Accumulator. The result is stored in the Accumulator. Note that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1.
  • Page 240 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SIZ [m] Skip if increment Data Memory is 0 Description The contents of the specified Data Memory are first incremented by 1. If the result is 0, the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a two cycle instruction.
  • Page 241 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU SUB A,x Subtract immediate data from ACC Description The immediate data specified by the code is subtracted from the contents of the Accumulator. The result is stored in the Accumulator. Note that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1.
  • Page 242 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU TABRD [m] Read table (specific page) to TBLH and Data Memory Description The low byte of the program code (specific page) addressed by the table pointer (TBLP and TBHP) is moved to the specified Data Memory and the high byte moved to TBLH.
  • Page 243 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Extended Instruction Definition The extended instructions are used to directly access the data stored in any data memory sections. LADC A,[m] Add Data Memory to ACC with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added.
  • Page 244 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LCLR [m] Clear Data Memory Description Each bit of the specified Data Memory is cleared to 0. Operation [m] ← 00H Affected flag(s) None LCLR [m].i Clear bit of Data Memory Description Bit i of the specified Data Memory is cleared to 0.
  • Page 245 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LDECA [m] Decrement Data Memory with result in ACC Description Data in the specified Data Memory is decremented by 1. The result is stored in the Accumulator. The contents of the Data Memory remain unchanged.
  • Page 246 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LRL [m] Rotate Data Memory left Description The contents of the specified Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0. Operation [m].(i+1) ← [m].i; (i=0~6) [m].0 ← [m].7...
  • Page 247 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LRRA [m] Rotate Data Memory right with result in ACC Description Data in the specified Data Memory is rotated right by 1 bit with bit 0 rotated into bit 7. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged.
  • Page 248 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LSDZ [m] Skip if decrement Data Memory is 0 Description The contents of the specified Data Memory are first decremented by 1. If the result is 0 the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a three cycle instruction.
  • Page 249 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LSIZA [m] Skip if increment Data Memory is zero with result in ACC Description The contents of the specified Data Memory are first incremented by 1. If the result is 0, the following instruction is skipped. The result is stored in the Accumulator but the specified Data Memory contents remain unchanged.
  • Page 250 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LSWAP [m] Swap nibbles of Data Memory Description The low-order and high-order nibbles of the specified Data Memory are interchanged. Operation [m].3~[m].0 ↔ [m].7~[m].4 Affected flag(s) None LSWAPA [m] Swap nibbles of Data Memory with result in ACC Description The low-order and high-order nibbles of the specified Data Memory are interchanged.
  • Page 251 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU LTABRDL [m] Read table (last page) to TBLH and Data Memory Description The low byte of the program code (last page) addressed by the table pointer (TBLP) is moved to the specified Data Memory and the high byte moved to TBLH.
  • Page 252 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU Package Information Note that the package information provided here is for consultation purposes only. As this information may be updated at regular intervals users are reminded to consult the Holtek website the latest version of the Package/Carton Information.
  • Page 253 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU 28-pin SSOP (150mil) Outline Dimensions &  " Dimensions in inch Symbol Min. Nom. Max. 0.236 BSC 0.154 BSC 0.008 — 0.012 C’ 0.390 BSC — — 0.069 0.025 BSC 0.004 — 0.010 0.016 —...
  • Page 254 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU 44-pin LQFP (10mm×10mm) (FP2.0mm) Outline Dimensions Dimensions in inch Symbol Min. Nom. Max. 0.472 BSC 0.394 BSC 0.472 BSC 0.394 BSC 0.032 BSC 0.012 0.015 0.018 0.053 0.055 0.057 — — 0.063 0.002 — 0.006 0.018...
  • Page 255 BS66F340C/BS66F350C/BS66F360C Touch A/D Flash MCU 48-pin LQFP (7mm×7mm) Outline Dimensions Dimensions in inch Symbol Min. Nom. Max. 0.354 BSC 0.276 BSC 0.354 BSC 0.276 BSC 0.020 BSC 0.007 0.009 0.011 0.053 0.055 0.057 — — 0.063 0.002 — 0.006 0.018 0.024...
  • Page 256 HOLTEK disclaims all liability arising from the information and its application. In addition, HOLTEK does not recommend the use of HOLTEK’s products where there is a risk of personal hazard due to malfunction or other reasons. HOLTEK hereby declares that it does not authorise the use of these products in life-saving, life-sustaining or safety critical components.

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