Holtek BS82B12A-3 Manual

Touch key 8-bit flash mcu with led/lcd driver

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Touch Key 8-Bit Flash MCU with LED/LCD Driver

BS82B12A-3/ BS82C16A-3/BS82D20A-3

Revision: V1.20

Date: �an�a�� 2�� 201�

�an�a�� 2�� 201�

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Summary of Contents for Holtek BS82B12A-3

Page 1: Cont�Ol Registe
Touch Key 8-Bit Flash MCU with LED/LCD Driver BS82B12A-3/ BS82C16A-3/BS82D20A-3 Revision: V1.20 Date: �an�a�� 2�� 201� �an�a�� 2�� 201�...
Page 2: Table Of Contents
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Table of Contents Features ......................6 CPU Feat��es ......................... 6 Pe�iphe�al Feat��es ......................... 6 General Description ..................7 Selection Table ....................7 Block Diagram ....................8 Pin Assignment ....................8 Pin Descriptions .................... 10 Absolute Maximum Ratings ................
Page 3 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver W�iting Data to the EEPROM ....................4� W�ite P�otection ........................4� EEPROM Inte��pt ........................ 4� P�og�amming Conside�ations ....................44 Oscillator ......................45 Oscillato� Ove�view ....................... 4� System Clock Configurations ....................4�...
Page 4: Ente�Ing The Sleep Mode
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TM Exte�nal Pins ........................70 TM Inp�t/O�tp�t Pin Cont�ol Registe� ................... 70 P�og�amming Conside�ations ....................7� Compact Type TM – CTM0 ................74 Compact TM Ope�ation ......................74 Compact T�pe TM Registe� Desc�iption................7�...
Page 5 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Managing Receive� E��o�s ....................129 UART Mod�le Inte��pt St��ct��e ..................1�0 Add�ess Detect Mode ......................1�1 UART Powe� Down and Wake-�p ..................1�2 Interrupts ...................... 133 Inte��pt Registe�s ....................... 1�� Inte��pt Ope�ation ......................1�6 Exte�nal Inte��pt .........................
Page 6: Features
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Features CPU Features • Operating voltage = 8MHz: V ~5.5V ♦ SYS = 12MHz: 2.7V~5.5V ♦ SYS = 16MHz: 4.5V~5.5V ♦ SYS • Up to 0.25μs instruction cycle with 16MHz system clock at V • Power down and wake-up functions to reduce power consumption • Three Oscillators High Speed Internal RC -- HIRC: 8/12/16MHz ♦ Low Speed Internal RC -- LIRC: 32kHz ♦ Low speed External Crystal -- LXT: 32768Hz (only for BS82C16A-3 and BS82D20A-3) ♦ • Multi-mode operation: NORMAL, SLOW, IDLE and SLEEP • All instructions executed in one or two instruction cycles • Table read instructions...
Page 7: General Description
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver General Description These devices are a series of Flash Memory type 8-bit high performance RISC architecture microcontrollers with fully integrated touch key functions. With all touch key functions provided internally and with the convenience of Flash Memory multi-programming features, these devices has all the features to offer designers a reliable and easy means of implementing Touch Keyes within their products applications. The touch key functions are fully integrated completely eliminating the need for external components. In addition to the flash program memory, other memory includes an area of RAM...
Page 8: Block Diagram
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Block Diagram Reset Voltage Ci�c�it Detect 8-bit Flash/EEPROM Watchdog Inte��pt RISC P�og�amming Ci�c�it�� Time� Cont�olle� (ICP/OCDS) Voltage Co�e Reset Oscillato� EEPROM Flash Time Data P�og�am Data Bases HIRC/LIRC Memo�� Memo�� Memo��...
Page 9: Reset F�Nctions
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver PB0/SSEG0/KEY1 PA�/SDA/RX PB1/SSEG1/KEY2 PA0/TCK1/SCOM2/ICPDA/OCDSDA 2� � PB2/SSEG2/KEY� PA2/SCOM�/ICPCK/OCDSCK PB�/SSEG�/KEY4 PA7/SCL/TX PB4/SSEG4/KEY� � PB�/SSEG�/KEY6 PB6/SSEG6/KEY7 PA1/SCOM0 PB7/SSEG7/KEY8 PA4/INT/TCK0/SCOM1 PC0/SSEG8/KEY9 PC7/TP0_1/SSEG1�/KEY16 PC1/SSEG9/KEY10 PC6/TP1_1/SSEG14/KEY1� 1� PC2/SSEG10/KEY11 PC�/SSEG1�/KEY14 PC�/SSEG11/KEY12 PC4/SSEG12/KEY1� 1� BS82C16A-3/BS82CV16A-3 24 SOP-A PA�/SDA/RX...
Page 10: Pin Descriptions
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver PA�/SDA/RX PB0/SSEG0/KEY1 PA0/TCK1/SCOM2/ICPDA/OCDSDA PB1/SSEG1/KEY2 PB2/SSEG2/KEY� � PA2/SCOM�/ICPCK/OCDSCK PB�/SSEG�/KEY4 2� PA7/SCL/TX � PB4/SSEG4/KEY� PB�/SSEG�/KEY6 2� PD1/TP0_0/SSEG17/XT2 PB6/SSEG6/KEY7 PD0/TP1_0/SSEG16/XT1 PB7/SSEG7/KEY8 PD�/SSEG19/KEY9 PA1/SCOM0/KEY20 PD2/SSEG18/KEY10 PA4/INT/TCK0/SCOM1/KEY19 PC0/SSEG8/KEY11 PC7/TP0_1/SSEG1�/KEY18 PC1/SSEG9/KEY12 PC6/TP1_1/SSEG14/KEY17 PC2/SSEG10/KEY1� 1� PC�/SSEG1�/KEY16 1� PC4/SSEG12/KEY1�...
Page 11 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pin Name Function Description PAWU PA� CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p and wake-�p. PAPU PA�/SDA/ IICC0 NMOS I C Data UCR1 — UART �eceive� data inp�t PAWU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p and wake-�p.
Page 12 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pin Name Function Description PCPU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p. PC2/ SSEG10/ SSEG10 SLCDC2 — CMOS LCD d�ive� o�tp�t fo� LCD panel segment KEY11 KEY11 TKM2C1 — To�ch ke� inp�t PC�...
Page 13 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pin Name Function Description PAWU PA� CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p and wake-�p. PAPU PA�/SDA/ IICC0 NMOS I C Data UCR1 — UART �eceive� data inp�t PAWU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p and wake-�p.
Page 14 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pin Name Function Description PCPU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p. PC2/ SSEG10/ SSEG10 SLCDC2 — CMOS LCD d�ive� o�tp�t fo� LCD panel segment KEY11 KEY11 TKM2C1 — To�ch ke� inp�t PC�...
Page 15 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver BS82D20A-3 Pin Name Function Description PAWU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p and wake-�p. PAPU PA0/TCK1/ TCK1 PTM0C0 — PTM0 clock inp�t SCOM2/ SCOM2 SLCDC0 — SCOM LCD d�ive� o�tp�t fo� LCD panel common...
Page 16 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pin Name Function Description PB� PBPU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p. PB�/SSEG�/ SSEG� SLCDC1 — CMOS LCD d�ive� o�tp�t fo� LCD panel segment KEY6 KEY6 TKM1C1 NSI — To�ch ke� inp�t PBPU CMOS Gene�al p��pose I/O.
Page 17: Absolute Maximum Ratings
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pin Name Function Description PDPU CMOS Gene�al p��pose I/O. Registe� enabled p�ll-�p. PD1/TP0_0/ TP0_0 TMPC — CMOS CTM0 o�tp�t SSEG17/ SSEG17 SLCDC� — CMOS LCD d�ive� o�tp�t fo� LCD panel segment —...
Page 18: D.c. Characteristics
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver D.C. Characteristics Ta=2�°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions = 8MHz — �.� Ope�ating Voltage (HIRC) — = 12MHz — �.� = 16MHz 4.� — �.� �V —...
Page 19 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions �V — IDLE1 Mode Standb� C��ent No load� s�stem HALT� WDT (HIRC� f � f enable� f = 12MHz �V — �V —...
Page 20: Characteristics
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions — kΩ Pull-high Resistance for I/O Ports — kΩ Bandgap Reference with Buffer — — 1.09 Voltage A.C. Characteristics Ta=25°C Test Conditions...
Page 21: Sensor Oscillator Electrical Characteristics
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Sensor Oscillator Electrical Characteristics Ta=2�°C Touch Key RC OSC = 500kHz Test Conditions Symbol Parameter Min. Typ. Max. Unit Condition �V — �0 =�00kHz� MnFILEN=0 μA SENOSC �V — Onl� Senso� (KEY) Oscillato�...
Page 22 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Touch Key RC OSC = 1000kHz Test Conditions Symbol Parameter Min. Typ. Max. Unit Condition �V — =1000kHz� MnFILEN=0 μA SENOSC �V — Onl� Senso� (KEY) Oscillato� KEYOSC Ope�ating C��ent �V —...
Page 23 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Touch Key RC OSC =1500kHz Test Conditions Symbol Parameter Min. Typ. Max. Unit Condition �V — =1�00kHz� MnFILEN=0 μA SENOSC �V — Onl� Senso� (KEY) Oscillato� KEYOSC Ope�ating C��ent �V —...
Page 24: Power-On Reset Characteristics
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Touch Key RC OSC =2000kHz Test Conditions Symbol Parameter Min. Typ. Max. Unit Condition �V — =2000kHz� MnFILEN=0 μA SENOSC �V — �20 Onl� Senso� (KEY) Oscillato� KEYOSC Ope�ating C��ent �V —...
Page 25: System Architecture
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver System Architecture A key factor in the high-performance features of the Holtek range of microcontrollers is attributed to their internal system architecture. The range of devices take advantage of the usual features found within RISC microcontrollers providing increased speed of operation and Periodic performance. The pipelining scheme is implemented in such a way that instruction fetching and instruction execution are overlapped, hence instructions are effectively executed in one cycle, with the exception of branch or call instructions. An 8-bit wide ALU is used in practically all instruction set operations, which carries out arithmetic operations, logic operations, rotation, increment, decrement, branch decisions, etc. The internal data path is simplified by moving data through the Accumulator and the ALU. Certain internal registers are implemented in the Data Memory and can be directly or indirectly addressed. The simple addressing methods of these registers along with additional architectural features ensure that a minimum of external components is required to provide a functional I/O control system with maximum reliability and flexibility. This makes these devices suitable for low- cost, high-volume production for controller applications. Clocking and Pipelining The main system clock, derived from either a LXT, HIRC or LIRC oscillator is subdivided into four internally generated non-overlapping clocks, T1~T4. The Program Counter is incremented at the beginning of the T1 clock during which time a new instruction is fetched. The remaining T2~T4 clocks carry out the decoding and execution functions. In this way, one T1~T4 clock cycle forms one instruction cycle. Although the fetching and execution of instructions takes place in consecutive instruction cycles, the pipelining structure of the microcontroller ensures that instructions are effectively executed in one instruction cycle. The exception to this are instructions where the...
Page 26: P�Og�Am Co�Nte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver F e t c h I n s t . 1 E x e c u t e I n s t . 1 M O V A , [ 1 2 H ] C A L L D E L A Y F e t c h I n s t .
Page 27: Stack
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Stack This is a special part of the memory which is used to save the contents of the Program Counter only. The stack is neither part of the data nor part of the program space, and is neither readable nor writeable. The activated level is indexed by the Stack Pointer, and is neither readable nor writeable. At a subroutine call or interrupt acknowledge signal, the contents of the Program Counter are pushed onto the stack. At the end of a subroutine or an interrupt routine, signaled by a return instruction, RET or RETI, the Program Counter is restored to its previous value from the stack. After a device reset, the Stack Pointer will point to the top of the stack. If the stack is full and an enabled interrupt takes place, the interrupt request flag will be recorded but the acknowledge signal will be inhibited. When the Stack Pointer is decremented, by RET or RETI, the interrupt will be serviced. This feature prevents stack overflow allowing the programmer to use the structure more easily. However, when the stack is full, a CALL subroutine instruction can still be executed which will result in a stack overflow. Precautions should be taken to avoid such cases which might cause unpredictable program branching. If the stack is overflow, the first Program Counter save in the stack will be lost. P r o g r a m C o u n t e r T o p o f S t a c k...
Page 28: Flash Program Memory
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Flash Program Memory The Program Memory is the location where the user code or program is stored. For this device series the Program Memory is Flash type, which means it can be programmed and re-programmed a large number of times, allowing the user the convenience of code modification on the same device. By using the appropriate programming tools, these Flash devices offer users the flexibility to conveniently debug and develop their applications while also offering a means of field programming and updating. Structure The Program Memory has a capacity of 2K×16 bits to 8K×16 bits. The Program Memory is addressed by the Program Counter and also contains data, table information and interrupt entries.
Page 29: Special Vecto�S
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Special Vectors Within the Program Memory, certain locations are reserved for the reset and interrupts. The location 0000H is reserved for use by the device reset for program initialisation. After a device reset is initiated, the program will jump to this location and begin execution. Look-up Table Any location within the Program Memory can be defined as a look-up table where programmers can store fixed data. To use the look-up table, the table pointer must first be setup by placing the address of the look up data to be retrieved in the table pointer register, TBLP and TBHP. These registers define the total address of the look-up table. After setting up the table pointer pair, the table data can be retrieved from the Program Memory using the "TABRD[m]" or "TABRDL[m]" instructions respectively. When the instruction is executed, the lower order table byte from the Program Memory will be transferred to the user defined Data Memory register [m] as specified in the instruction. The higher order table data byte...
Page 30 00Ah, 00Bh, 00Ch, 00Dh, 00Eh, 00Fh, 01Ah, 01Bh In Circuit Programming – ICP The provision of Flash type Program Memory provides the user with a means of convenient and easy upgrades and modifications to their programs on the same device. As an additional convenience, Holtek has provided a means of programming the microcontroller in-circuit using a 4-pin interface. This provides manufacturers with the possibility of manufacturing their circuit boards complete with a programmed or un-programmed microcontroller, and then programming or upgrading the program at a later stage. This enables product manufacturers to easily keep their manufactured products supplied with the latest program releases without removal and re-insertion of the device. The Holtek Flash MCU to Writer Programming Pin correspondence table is as follows: Holtek Write Pins MCU Programming Pins Function ICPDA Se�ial data/add�ess inp�t/o�tp�t ICPCK Se�ial Clock inp�t Powe� S�ppl� G�o�nd The Program Memory and EEPROM data memory can both be programmed serially in-circuit using this 4-wire interface. Data is downloaded and uploaded serially on a single pin with an additional...
Page 31: On-Chip Deb�G S�Ppo�T - Ocds
OCDSCK pin is the OCDS clock input pin. When users use the EV chip for debugging, other functions which are shared with the OCDSDA and OCDSCK pins in the actual MCU device will have no effect in the EV chip. However, the two OCDS pins which are pin-shared with the ICP programming pins are still used as the Flash Memory programming pins for ICP. For a more detailed OCDS description, refer to the corresponding document named "Holtek e-Link for 8-bit MCU OCDS User’s Guide". Holtek e-Link Pins EV Chip Pins Pin Description...
Page 32: Ram Data Memory
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver RAM Data Memory The Data Memory is a volatile area of 8-bit wide RAM internal memory and is the location where temporary information is stored. Structure Divided into two types, the first of these is an area of RAM, known as the Special Function Data Memory. Here are located registers which are necessary for correct operation of the device. Many of these registers can be read from and written to directly under program control, however, some remain protected from user manipulation. The second area of Data Memory is known as the General Purpose Data Memory, which is reserved for general purpose use. All locations within this area are read and write accessible under program control. The overall Data Memory is subdivided into several banks for the devices. The Special Purpose Data Memory registers addressed from 00H~7FH in Data Memory are common and accessible in all banks, with the exception of the EEC register at address 40H which is only accessible in Bank 1. Switching between the different Data Memory sectors is achieved by setting the Bank Pointer to the correct value. The start address of the Data Memory for all devices is the address 00H. Memory Type Device Capacity Bank 0~2: 00H~7FH BS82B12A-� EEC �egiste� at 40H onl� accessible in Bank 1 Special F�nction...
Page 33 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver B a n k 0 ~ 2 B a n k 0 , 2 B a n k 1 I A R 0 E E C 0 0 H 4 0 H...
Page 34 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver B a n k 0 ~ 3 B a n k 0 , 2 ~ 3 B a n k 1 I A R 0 E E C 0 0 H...
Page 35 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver B a n k 0 ~ 5 B a n k 0 , 2 ~ 5 B a n k 1 I A R 0 E E C 0 0 H...
Page 36: Special Function Register Description
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Special Function Register Description Most of the Special Function Register details will be described in the relevant functional section, however several registers require a separate description in this section. Indirect Addressing Registers – IAR0, IAR1 The Indirect Addressing Registers, IAR0 and IAR1, although having their locations in normal RAM register space, do not actually physically exist as normal registers. The method of indirect addressing for RAM data manipulation uses these Indirect Addressing Registers and Memory Pointers, in contrast to direct memory addressing, where the actual memory address is specified. Actions on the IAR0 and IAR1 registers will result in no actual read or write operation to these registers but rather to the memory location specified by their corresponding Memory Pointers, MP0 or MP1. Acting as a pair, IAR0 and MP0 can together access data from Bank 0 while the IAR1 and MP1 register pair can access data from any bank. As the Indirect Addressing Registers are not physically implemented, reading the Indirect Addressing Registers directly will return a result of "00H" and writing to the registers directly will result in no operation.
Page 37: Bank Pointe
— — — — — DMBP1 DMBP0 BS82D20A-� — — — — — DMBP2 DMBP1 DMBP0 BP Register List BP Register – BS82B12A-3 Name — — — — — — DMBP1 DMBP0 — — — — — — — —...
Page 38 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver BP Register – BS82D20A-3 Name — — — — — DMBP2 DMBP1 DMBP0 — — — — — — — — — — Bit 7 ~ 3 Unimplemented, read as "0" Bit 2 ~ 0 DMBP2~DMBP0: Select Data Memory Banks 000: Bank 0 001: Bank 1 010: Bank 2 011: Bank 3...
Page 39: Stat�S Registe� - Status
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Status Register – STATUS This 8-bit register contains the zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow flag (OV), power down flag (PDF) and watchdog time-out flag (TO). These arithmetic/logical operation and system management flags are used to record the status and operation of the microcontroller. With the exception of the TO and PDF flags, bits in the status register can be altered by instructions like most other registers. Any data written into the status register will not change the TO or PDF flag. In addition, operations related to the status register may give different results due to the different instruction operations. The TO flag can be affected only by a system power-up, a WDT time-out or by executing the "CLR WDT" or "HALT" instruction. The PDF flag is affected only by executing the "HALT" or "CLR WDT" instruction or during a system power-up. The Z, OV, AC and C flags generally reflect the status of the latest operations. • C is set if an operation results in a carry during an addition operation or if a borrow does not take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate through carry instruction. • AC is set if an operation results in a carry out of the low nibbles in addition, or no borrow from the high nibble into the low nibble in subtraction; otherwise AC is cleared. • Z is set if the result of an arithmetic or logical operation is zero; otherwise Z is cleared. • OV is set if an operation results in a carry into the highest-order bit but not a carry out of the highest-order bit, or vice versa; otherwise OV is cleared. • PDF is cleared by a system power-up or executing the "CLR WDT" instruction. PDF is set by executing the "HALT" instruction. • TO is cleared by a system power-up or executing the "CLR WDT" or "HALT" instruction. TO is set by a WDT time-out.
Page 40 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver STATUS Register Name — — — — — — "x" �nknown Bit 6 Unimplemented, read as "0" Bit 5 TO: Watchdog Time-Out flag 0: After power up or executing the "CLR WDT" or "HALT" instruction 1: A watchdog time-out occurred. Bit 4 PDF: Power down flag 0: After power up or executing the "CLR WDT" instruction 1: By executing the "HALT" instruction Bit 3 OV: Overflow flag 0: no overflow 1: an operation results in a carry into the highest-order bit but not a carry out of the highest-order bit or vice versa. Z: Zero flag Bit 2 0: The result of an arithmetic or logical operation is not zero 1: The result of an arithmetic or logical operation is zero AC: Auxiliary flag...
Page 41: Eeprom Data Memory
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver EEPROM Data Memory The devices contain an area of internal EEPROM Data Memory. EEPROM, which stands for Electrically Erasable Programmable Read Only Memory, is by its nature a non-volatile form of memory, with data retention even when its power supply is removed. By incorporating this kind of data memory, a whole new host of application possibilities are made available to the designer. The availability of EEPROM storage allows information such as product identification numbers, calibration values, specific user data, system setup data or other product information to be stored directly within the product microcontroller. The process of reading and writing data to the EEPROM memory has been reduced to a very trivial affair. EEPROM Data Memory Structure The EEPROM Data Memory capacity is 64×8 bits. Unlike the Program Memory and RAM Data Memory, the EEPROM Data Memory is not directly mapped and is therefore not directly accessible in the same way as the other types of memory. Read and Write operations to the EEPROM are carried out in single byte operations using an address and data register in Sector 0 and a single control register in Sector 1.
Page 42 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver EED Register Name D� D� Bit 7 ~ 0 Data EEPROM data Data EEPROM data bit 7 ~ bit 0 EEC Register Name — — — — WREN RDEN — — — — — — — — Bit 7 ~ 4 Unimplemented, read as "0" Bit 3 WREN: Data EEPROM Write Enable 0: Disable 1: Enable This is the Data EEPROM Write Enable Bit which must be set high before Data EEPROM write operations are carried out. Clearing this bit to zero will inhibit Data...
Page 43: W�Iting Data To The Eeprom
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Reading Data from the EEPROM To read data from the EEPROM, the read enable bit, RDEN, in the EEC register must first be set high to enable the read function. The EEPROM address of the data to be read must then be placed in the EEA register. If the RD bit in the EEC register is now set high, a read cycle will be initiated. Setting the RD bit high will not initiate a read operation if the RDEN bit has not been set. When the read cycle terminates, the RD bit will be automatically cleared to zero, after which the data can be read from the EED register. The data will remain in the EED register until another read or write operation is executed. The application program can poll the RD bit to determine when the data is valid for reading. Writing Data to the EEPROM To write data to the EEPROM, the EEPROM address of the data to be written must first be placed in the EEA register and the data placed in the EED register. Then the write enable bit, WREN, in the EEC register must first be set high to enable the write function. After this, the WR bit in the EEC register must be immediately set high to initial a write cycle. These two instructions must be executed consecutively. The global interrupt bit EMI should also first be cleared before...
Page 44: P�Og�Amming Conside�Ations
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Programming Considerations Care must be taken that data is not inadvertently written to the EEPROM. Protection can be enhanced by ensuring that the Write Enable bit is normally cleared to zero when not writing. Also the Memory Pointer high byte register could be normally cleared to zero as this would inhibit access to Sector 1 where the EEPROM control register exist. Although certainly not necessary,...
Page 45: Oscillator
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Oscillator Various oscillator options offer the user a wide range of functions according to their various application requirements. The flexible features of the oscillator functions ensure that the best optimisation can be achieved in terms of speed and power saving. Oscillator selections and operation are selected through a combination of configuration options and registers. Oscillator Overview All the devices include two internal oscillators and the some devices also include an external oscillator. In addition to being the source of the main system clock the oscillators also provide clock...
Page 46: Inte�Nal Rc Oscillato� - Hirc
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver H i g h S p e e d O s c i l l a t i o n 6 - s t a g e P r e s c a l e r...
Page 47: Exte�Nal �2.768Khz C
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver External 32.768kHz Crystal Oscillator – LXT For the BS82C16A-3 and BS82D20A-3 devices, the External 32.768kHz Crystal System Oscillator is one of the low frequency oscillator choices, which is selected via configuration option. This clock source has a fixed frequency of 32.768kHz and requires a 32.768kHz crystal to be connected between pins XT1 and XT2. The external resistor and capacitor components connected to the 32.768kHz crystal are necessary to provide oscillation. For applications where precise frequencies are essential, these components may be required to provide frequency compensation due to different crystal manufacturing tolerances. During power-up there is a time delay associated with the LXT oscillator waiting for it to start-up. When the microcontroller enters the SLEEP or IDLE Mode, the system clock is switched off to stop microcontroller activity and to conserve power. However, in many microcontroller applications it may be necessary to keep the internal timers operational even when the microcontroller is in the SLEEP or IDLE Mode. To do this, another clock, independent of the system clock, must be provided.
Page 48: Lxt Oscillato� Low Powe� F�Nction
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver LXT Oscillator Low Power Function The LXT oscillator can function in one of two modes, the Quick Start Mode and the Low Power Mode. The mode selection is executed using the LXTLP bit in the CTRL register. LXTLP Bit LXT Mode Q�ick Sta�t Low-powe� After power on, the LXTLP bit will be automatically cleared to zero ensuring that the LXT oscillator is in the Quick Start operating mode. In the Quick Start Mode the LXT oscillator will power up and stabilise quickly. However, after the LXT oscillator has fully powered up it can be placed into the Low-power mode by setting the LXTLP bit high. The oscillator will continue to run but with reduced current consumption, as the higher current consumption is only required during the LXT oscillator start-up. In power sensitive applications, such as battery applications, where power consumption must be kept to a minimum, it is therefore recommended that the application program sets the LXTLP bit high about 2 seconds after power-on. It should be noted that, no matter what condition the LXTLP bit is set to, the LXT oscillator will always function normally, the only difference is that it will take more time to start up if in the Low- power mode. Operating Modes and System Clocks...
Page 49 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver H i g h S p e e d O s c i l l a t i o n 6 - s t a g e P r e s c a l e r...
Page 50: S�Stem Ope�Ation Modes
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver System Operation Modes There are five different modes of operation for the microcontroller, each one with its own special characteristics and which can be chosen according to the specific performance and power requirements of the application. There are two modes allowing normal operation of the...
Page 51 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Control Register The SMOD register is used to control the internal clocks within the devices. SMOD Register Name CKS2 CKS1 CKS0 — IDLEN HLCLK — — Bit 7 ~ 5 CKS2 ~ CKS0: The system clock selection when HLCLK is "0" 000: f (LIRC or LXT) SUB 001: f (LIRC or LXT) 010: f 011: f 100: f 101: f 110: f 111: f These three bits are used to select which clock is used as the system clock source. In addition to the system clock source, which can be either the LXT or LIRC, a divided version of the high speed system oscillator can also be chosen as the system clock source.
Page 52 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CTRL Register Name FSYSON — HIRCS1 HIRCS0 LXTLP LVRF — — "x" �nknown Bit 7 FSYSON: f Control in IDLE Mode 0: Disable 1: Enable Bit 6 Unimplemented, read as "0". Bit 5 ~ 4 HIRCS1~HIRCS0: HIRC frequency clock select 00: 8MHz 01: 12 MHz 10: 16 MHz 11: 8 MHz It is recommended that the HIRC frequency selected by these two bits is the same with the frequency determined by the configuration option to keep the HIRC frequency accuracy specified in the A.C. characteristics. Bit 3 LXTLP: LXT low power control...
Page 53: Normal Mode To Slow Mode Switching
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Operating Mode Switching The devices can switch between operating modes dynamically allowing the user to select the best performance/power ratio for the present task in hand. In this way microcontroller operations that do not require high performance can be executed using slower clocks thus requiring less operating current and prolonging battery life in portable applications. In simple terms, Mode Switching between the NORMAL Mode and SLOW Mode is executed using the HLCLK bit and CKS2~CKS0 bits in the SMOD register while Mode Switching from the NORMAL/SLOW Modes to the SLEEP/IDLE Modes is executed via the HALT instruction. When a HALT instruction is executed, whether the devices enter the IDLE Mode or the SLEEP Mode is determined by the condition of the IDLEN bit in the SMOD register and FSYSON in the CTRL register. When the HLCLK bit switches to a low level, which implies that clock source is switched from the high speed clock source, f , to the clock source, f /2~f /64 or f . If the clock is from the f...
Page 54: Slow Mode To Normal Mode Switching
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver SLOW Mode to NORMAL Mode Switching In SLOW Mode the system uses either the LXT or LIRC low speed system oscillator. To switch back to the NORMAL Mode, where the high speed system oscillator is used, the HLCLK bit should be set high or HLCLK bit is low, but CKS2~CKS0 is set to "010", "011", "100", "101", "110" or "111". As a certain amount of time will be required for the high frequency clock to stabilise, the status of the HTO bit is checked. The amount of time required for high speed system oscillator stabilization is 15~16 clock cycles. S L O W M o d e C K S 2 ~ C K S 0 ¹ 0 0 0 B , 0 0 1 B a s H L C L K = 0...
Page 55: Ente�Ing The Idle0 Mode
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Entering the IDLE0 Mode There is only one way for the devices to enter the IDLE0 Mode and that is to execute the "HALT" instruction in the application program with the IDLEN bit in SMOD register equal to "1" and the FSYSON bit in CTRL register equal to "0". When this instruction is executed under the conditions described above, the following will occur: • The system clock will be stopped and the application program will stop at the "HALT" instruc- tion, but the low frequency f clock will be on. • The Data Memory contents and registers will maintain their present condition. • The WDT will be cleared and resume counting. • The I/O ports will maintain their present conditions. • In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO, will be cleared. Entering the IDLE1 Mode There is only one way for the devices to enter the IDLE1 Mode and that is to execute the "HALT" instruction in the application program with the IDLEN bit in SMOD register equal to "1" and the FSYSON bit in CTRL register equal to "1". When this instruction is executed under the conditions described above, the following will occur: • The system clock and the low frequency f...
Page 56: Wake
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Wake-up After the system enters the SLEEP or IDLE Mode, it can be woken up from one of various sources listed as follows: • An external falling edge on Port A • A system interrupt • A WDT overflow If the device is woken up by a WDT overflow, a Watchdog Timer reset will be initiated. The PDF flag is cleared by a system power-up or executing the clear Watchdog Timer instructions and is set when executing the "HALT" instruction. The TO flag is set if a WDT time-out occurs, and causes a wake-up that only resets the Program Counter and Stack Pointer, the other flags remain in their original status. Each pin on Port A can be setup using the PAWU register to permit a negative transition on the pin to wake-up the system. When a Port A pin wake-up occurs, the program will resume execution at the instruction following the "HALT" instruction. If the system is woken up by an interrupt, then two possible situations may occur. The first is where the related interrupt is disabled or the interrupt is enabled but the stack is full, in which case the program will resume execution at the instruction following the "HALT" instruction. In this situation, the interrupt which woke-up the device will not be immediately serviced, but will rather be serviced later when the related interrupt is finally enabled or when a stack level becomes free. The other situation is where the related interrupt is enabled and the stack is not full, in which case the regular interrupt response takes place. If an interrupt request flag is set high before entering the SLEEP or IDLE Mode, the wake-up function of the related interrupt will be disabled. Wake-up Time Wake-up Time Wake-up Time...
Page 57: Watchdog Timer
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Watchdog Timer The Watchdog Timer is provided to prevent program malfunctions or sequences from jumping to unknown locations, due to certain uncontrollable external events such as electrical noise. Watchdog Timer Clock Source The Watchdog Timer clock source is provided by the internal f clock, depending on the devices, the f clock is in turn supplied by the LIRC oscillator or either the LXT or LIRC oscillator selected by a configuration option. The LIRC internal oscillator has an approximate frequency of 32kHz and this specified internal clock period can vary with V , temperature and process variations. The LXT oscillator is supplied by an external 32.768 kHz crystal. The Watchdog Timer source clock is then subdivided by a ratio of 2 to 2 to give longer timeouts, the actual value being chosen using the WS2~WS0 bits in the WDTC register. Watchdog Timer Control Register A single register, WDTC, controls the required timeout period as well as the enable operation. The WDTC register is initiated to 01010011B at any reset except WDT time-out hardware warm reset. WDTC Register Name WE� WE4 ~ WE0: WDT function software control...
Page 58 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CTRL Register Name FSYSON — HIRCS1 HIRCS0 LXTLP LVRF — — "x" �nknown Bit 7 FSYSON: f Control in IDLE Mode Describe elsewhere Bit 6 Unimplemented, read as "0" Bit 5~ 4 HIRCS1~HIRCS0: HIRC frequency clock select Describe elsewhere Bit 3 LXTLP: LXT low power control Describe elsewhere Bit 2 LVRF: LVR function reset flag Describe elsewhere Bit 1 Undefined bit This bit can be read or written by user software program...
Page 59: Reset And Initialisation
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Reset WDTC Registe� WE4~WE0 bits “HALT”Inst��ction “CLR WDT”Inst��ction LIRC 11 stage divide� WDT Time-o�t WS[2:0]= 8-to-1 MUX 7-stage Divide� 000:2 Config��ation 001:2 Option 010:2 WS2~WS0 011:2 1� 100:2 101:2 110:2 111:2 Note: For the BS82B12A-3 device, the f is supplied only by the LIRC oscillator.
Page 60 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Low Voltage Reset – LVR The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of the device. The LVR function is always enabled with a specific LVR voltage, V . If the supply voltage of the device drops to within a range of 0.9V~V such as might occur when changing the battery, the LVR will automatically reset the device internally and the LVRF bit in the CTRL register will also be set high. For a valid LVR signal, a low voltage, i.e., a voltage in the range between 0.9V~V must exist for greater than the value t specified in the A.C. characteristics. If the low voltage state does not exceed this value, the LVR will ignore the low supply voltage and will not perform a reset function. The actual V is fixed at a voltage value of 2.55V. Note that the LVR function will be automatically disabled when the device enters the SLEEP or IDLE mode. L V R R S T D + S S T I n t e r n a l R e s e t...
Page 61: Reset Initial Conditions
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Watchdog Time-out Reset during SLEEP or IDLE Mode The Watchdog time-out Reset during SLEEP or IDLE Mode is a little different from other kinds of reset. Most of the conditions remain unchanged except that the Program Counter and the Stack Pointer will be cleared to zero and the TO flag will be set high. Refer to the A.C. Characteristics for details. W D T T i m e - o u t S S T I n t e r n a l R e s e t Note: The t is 15~16 clock cycles if the system clock source is provided by the HIRC.
Page 62 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver LVR Reset WDT Time-out WDT Time-out Register Power On Reset (Normal Operation) (Normal Operation) (HALT)* P�og�am ● ● ● 0000H 0000H 0000H 0000H Co�nte� ● ● ● x x x x x x x x �...
Page 63 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver LVR Reset WDT Time-out WDT Time-out Register Power On Reset (Normal Operation) (Normal Operation) (HALT)* TXR_RXR ● ● ● x x x x x x x x x x x x x x x x x x x x x x x x �...
Page 64 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver LVR Reset WDT Time-out WDT Time-out Register Power On Reset (Normal Operation) (Normal Operation) (HALT)* CTM0DL ● ● ● 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 �...
Page 65: Input/Output Ports
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Input/Output Ports Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output designation of every pin fully under user program control, pull-high selections for all ports and wake-up selections on certain pins, the user is provided with an I/O structure to meet the needs of a wide range of application possibilities. The devices provide bidirectional input/output lines labeled with port names PA ~ PD. These I/O ports are mapped to the RAM Data Memory with specific addresses as shown in the Special Purpose Data Memory table. All of these I/O ports can be used for input and output operations. For input operation, these ports are non-latching, which means the inputs must be ready at the T2 rising edge of instruction "MOV A, [m]", where m denotes the port address. For output operation, all the data is latched and remains unchanged until the output latch is rewritten. I/O Register List Register Device Name PAWU PAWU7 — — PAWU4 PAWU� PAWU2 PAWU1 PAWU0 PAPU PAPU7 — —...
Page 66: P�Ll-High Resisto�S
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Pull-high Resistors Many product applications require pull-high resistors for their switch inputs usually requiring the use of an external resistor. To eliminate the need for these external resistors, all I/O pins, when configured as an input have the capability of being connected to an internal pull-high resistor. These pull-high resistors are selected using registers PAPU~PDPU, and are implemented using weak PMOS transistors. Port A Wake-up The HALT instruction forces the microcontroller into the SLEEP or IDLE Mode which preserves power, a feature that is important for battery and other low-power applications. Various methods exist to wake-up the microcontroller, one of which is to change the logic condition on one of the Port A pins from high to low. This function is especially suitable for applications that can be woken up via external switches. Each pin on Port A can be selected individually to have this wake-up feature using the PAWU register. I/O Port Control Registers Each I/O port has its own control register known as PAC~PDC, to control the input/output configuration. With this control register, each CMOS output or input can be reconfigured...
Page 67 01 : source = Level 1 10 : source = Level 2 11 : source = Level 3 (max.) These bits are available when the corresponding pin is configured as a CMOS output. Bit 3 ~ 2 PAPS3~PAPS2: PA7 and PA4 source current select 00 : source = Level 0 (min.) 01 : source = Level 1 10 : source = Level 2 11 : source = Level 3 (max.) These bits are available when the corresponding pin is configured as a CMOS output. Bit 1 ~ 0 PAPS1~PAPS0: PA3~PA0 source current select 00 : source = Level 0 (min.) 01 : source = Level 1 10 : source = Level 2 11 : source = Level 3 (max.) These bits are available when the corresponding pin is configured as a CMOS output. SLEDC1 Register – BS82B12A-3 Name — — — — PCPS� PCPS2 PCPS1 PCPS0 — — — — — — — — Bit 7 ~ 4 Unimplemented, read as "0"...
Page 68: P�Og�Amming Conside�Ations
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver PCPS1~PCPS0: PC3~PC0 source current select Bit 1 ~ 0 00 : source = Level 0 (min.) 01 : source = Level 1 10 : source = Level 2 11 : source = Level 3 (max.) These bits are available when the corresponding pin is configured as a CMOS output. SLEDC1 Register – BS82C16A-3/BS82D20A-3 Name — — PDPS1 PDPS0 PCPS� PCPS2 PCPS1 PCPS0 — — — — Bit 7 ~ 6 Unimplemented, read as "0" PDPS1~PDPS0: PD3~PD0 source current select Bit 5 ~ 4 00 : source = Level 0 (min.) 01 : source = Level 1 10 : source = Level 2 11 : source = Level 3 (max.)
Page 69: Timer Modules - Tm
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Timer Modules – TM One of the most fundamental functions in any microcontroller device is the ability to control and measure time. To implement time related functions the device includes several Timer Modules, abbreviated to the name TM. The TMs are multi-purpose timing units and serve to provide operations such as Timer/Counter, Input Capture, Compare Match Output and Single Pulse Output as well as being the functional unit for the generation of PWM signals. Each of the TMs has two individual interrupts. The addition of input and output pins for each TM ensures that users are provided with timing units with a wide and flexible range of features.
Page 70: Tm Inte
T M 0 P C 1 C T M 0 P C 7 T C K I n p u t P A 4 / T C K 0 BS82B12A-3 CTM Function Pin Control Block Diagram Rev. 1.20 �an�a�� 2�� 201�...
Page 71 P T 0 C K S T M 1 P C 0 T C K I n p u t P A 0 / T C K 1 BS82B12A-3 PTM Function Pin Control Block Diagram Rev. 1.20 �an�a�� 2�� 201�...
Page 72 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver P D 0 O u t p u t F u n c t i o n P D 0 / T P 1 _ 0 T M 1 P C 0...
Page 73 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Programming Considerations The TM Counter Registers and the Capture/Compare CCRA and CCRP registers, being 10-bit, all have a low and high byte structure. The high bytes can be directly accessed, but as the low bytes can only be accessed via an internal 8-bit buffer, reading or writing to these register pairs must be carried out in a specific way. The important point to note is that data transfer to and from the 8-bit buffer and its related low byte only takes place when a write or read operation to its corresponding high byte is executed. As the CCRA and CCRP registers are implemented in the way shown in the following diagram and accessing these registers is carried out in a specific way described above, it is recommended to use the "MOV" instruction to access the CCRA and CCRP low byte registers, named xTMnAL and PTMnRPL, in the following access procedures. Accessing the CCRA or CCRP low byte register without following these access procedures will result in unpredictable values. xTMn Co�nte� Registe� (Read onl�) xTMnDL xTMnDH 8-bit B�ffe� xTMnAL xTMnAH xTMn CCRA Registe� (Read/W�ite) PTMnRPL PTMnRPH PTMn CCRP Registe� (Read/W�ite) Data B�s...
Page 74: Compact Type Tm - Ctm0
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Compact Type TM – CTM0 Although the simplest form of the two TM types, the Compact TM type still contains three operating modes, which are Compare Match Output, Timer/Event Counter and PWM Output modes. The Compact TM can also be controlled with an external input pin and can drive two external output pins. C C R P C o m p a r a t o r P M a t c h 3 - b i t C o m p a r a t o r P...
Page 75 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Compact Type TM Register Description Overall operation of each Compact TM is controlled using several registers. A read only register pair exists to store the internal counter 10-bit value, while a read/write register pair exists to store the internal 10-bit CCRA value. The remaining two registers are control registers which setup the different operating and control modes as well as the three CCRP bits. Register Name CTM0C0 CT0PAU CT0CK2 CT0CK1 CT0CK0 CT0ON CT0RP2 CT0RP1 CT0RP0 CTM0C1 CT0M1 CT0M0 CT0IO1 CT0IO0 CT0OC CT0POL CT0DPX CT0CCLR CTM0DL D�...
Page 76 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CT0ON: CTM0 Counter On/Off Control Bit 3 0: Off 1: On This bit controls the overall on/off function of the CTM0. Setting the bit high enables the counter to run, clearing the bit disables the CTM0. Clearing this bit to zero will stop the counter from counting and turn off the CTM0 which will reduce its power consumption. When the bit changes state from low to high the internal counter value will be reset to zero, however when the bit changes from high to low, the internal counter will retain its residual value. If the CTM0 is in the Compare Match Output Mode then the CTM0 output pin will be reset to its initial condition, as specified by the CT0OC bit, when the CT0ON bit changes from low to high. Bit 2~0 CT0RP2~CT0RP0: CTM0 CCRP 3-bit register, compared with the CTM0 Counter bit 9~bit 7 Comparator P Match Period 000: 1024 CTM0 clocks 001: 128 CTM0 clocks 010: 256 CTM0 clocks 011: 384 CTM0 clocks 100: 512 CTM0 clocks 101: 640 CTM0 clocks 110: 768 CTM0 clocks 111: 896 CTM0 clocks These three bits are used to setup the value on the internal CCRP 3-bit register, which are then compared with the internal counter’s highest three bits. The result of this comparison can be selected to clear the internal counter if the CT0CCLR bit is set to zero. Setting the CT0CCLR bit to zero ensures that a compare match with the CCRP values will reset the internal counter. As the CCRP bits are only compared with the highest three counter bits, the compare values exist in 128 clock cycle multiples.
Page 77 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Timer/counter Mode Unused These two bits are used to determine how the CTM0 output pin changes state when a certain condition is reached. The function that these bits select depends upon in which mode the CTM0 is running. In the Compare Match Output Mode, the CT0IO1 and CT0IO0 bits determine how the CTM0 output pin changes state when a compare match occurs from the Comparator A. The CTM0 output pin can be setup to switch high, switch low or to toggle its present state when a compare match occurs from the Comparator A. When the bits are both zero, then no change will take place on the output. The initial value of the CTM0 output pin should be setup using the CT0OC bit in the CTM0C1 register. Note that the output level requested by the CT0IO1 and CT0IO0 bits must be different from the initial value setup using the CT0OC bit otherwise no change will occur on the CTM0 output pin when a compare match occurs. After the CTM0 output pin changes state it can be reset to its initial level by changing the level of the CT0ON bit from low to high. In the PWM Mode, the CT0IO1 and CT0IO0 bits determine how the CTM0 output pin changes state when a certain compare match condition occurs. The PWM output function is modified by changing these two bits. It is necessary to only change the values of the CT0IO1 and CT0IO0 bits only after the CTM0 has been switched off. Unpredictable PWM outputs will occur if the CT0IO1 and CT0IO0 bits are changed when The CTM0 is running. Bit 3 CT0OC: TP0 Output control bit Compare Match Output Mode 0: Initial low 1: Initial high PWM Mode 0: Active low 1: Active high This is the output control bit for the CTM0 output pin. Its operation depends upon whether CTM0 is being used in the Compare Match Output Mode or in the PWM Mode. It has no effect if the CTM0 is in the Timer/Counter Mode. In the Compare...
Page 78 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CTM0DL Register Name D� D� Bit 7 ~ 0 CTM0 Counter Low Byte Register bit 7 ~ bit 0 CTM0 10-bit Counter bit 7 ~ bit 0 CTM0DH Register Name — — — — — — — — — — — — — — — — — — Bit 7 ~ 2 Unimplemented, read as "0"...
Page 79: Compact T�Pe Tm Ope�Ating Modes
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Compact Type TM Operating Modes The Compact Type TM can operate in one of three operating modes, Compare Match Output Mode, PWM Output Mode or Timer/Counter Mode. The operating mode is selected using the CT0M1 and CT0M0 bits in the CTM0C1 register. Compare Match Output Mode To select this mode, bits CT0M1 and CT0M0 in the CTM0C1 register, should be set to 00 respectively. In this mode once the counter is enabled and running it can be cleared by three methods. These are a counter overflow, a compare match from Comparator A and a compare match...
Page 80 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CT0CCLR= 0; CT0M[1:0] = 00 Co�nte� Co�nte� Val�e ove�flow CCRP > 0 Co�nte� clea�ed b� CCRP val�e CCRP = 0 0x�FF Co�nte� Res�me Reset CCRP > 0 CCRP Pa�se Stop CCRA...
Page 81 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CT0CCLR = 1; CT0M[1:0] = 00 Co�nte� Val�e CCRA > 0 Co�nte� clea�ed b� CCRA val�e CCRA = 0 Co�nte� ove�flow 0x�FF Res�me CCRA = 0 CCRA Co�nte� Reset Pa�se Stop...
Page 82: Time�/Co�Nte� Mode
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Timer/Counter Mode To select this mode, bits CT0M1 and CT0M0 in the CTM0C1 register should be set to 11 respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags. The exception is that in the Timer/Counter Mode the CTM0 output pin is not used. Therefore the above description and Timing Diagrams for the Compare Match Output Mode can be used to understand its function. As the CTM0 output pin is not...
Page 83 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Counter CT0DPX=0; CT0M[1:0]=10 Value Counter Cleared by CCRP Counter reset when CT0ON returns high CCRP Counter Stop If Pause Resume CT0ON bit low CCRA Time CT0ON CT0PAU CT0POL CCRA Int. Flag CTMA0F CCRP Int. Flag CTMP0F CTM0 O/P Pin (CT0OC=1) CTM0 O/P Pin (CT0OC=0) Output Inverts PWM resumes PWM Duty Cycle Output controlled by When CT0POL = 1 operation...
Page 84 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Counter CT0DPX=1; CT0M[1:0]=10 Value Counter Cleared by CCRA Counter reset when CT0ON returns high CCRA Counter Stop If Pause Resume CT0ON bit low CCRP Time CT0ON CT0PAU CT0POL CCRP Int. Flag CTMP0F CCRA Int. Flag CTMA0F CTM0 O/P Pin (CT0OC=1) CTM0 O/P Pin (CT0OC=0) Output Inverts PWM resumes PWM Duty Cycle Output controlled by When CT0POL = 1 operation...
Page 85: Periodic Type Tm - Ptm0
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Periodic Type TM – PTM0 The Periodic Type TM contains five operating modes, which are Compare Match Output, Timer/ Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Periodic TM can be controlled with one external input pin and can drive two external output pins. C C R P C o m p a r a t o r P M a t c h P T M P 0 F I n t e r r u p t...
Page 86: Pe�Iodic T�Pe Tm Registe� Desc�Iption
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Periodic Type TM Register Description Overall operation of the Periodic Type TM is controlled using a series of registers. A read only register pair exists to store the internal counter 10-bit value, while two read/write register pairs exist to store the internal 10-bit CCRA value and CCRP value. The remaining two registers are control registers which setup the different operating and control modes. Register Name PTM0C0 PT0PAU PT0CK2 PT0CK1 PT0CK0 PT0ON — — — PTM0C1 PT0M1 PT0M0 PT0IO1 PT0IO0 PT0OC PT0POL PT0CKS PT0CCLR PTM0DL D�...
Page 87 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver PT0ON: PTM0 Counter On/Off Control Bit 3 0: Off 1: On This bit controls the overall on/off function of the PTM0. Setting the bit high enables the counter to run, clearing the bit disables the PTM0. Clearing this bit to zero will stop the counter from counting and turn off the PTM0 which will reduce its power consumption. When the bit changes state from low to high the internal counter value will be reset to zero, however when the bit changes from high to low, the internal counter will retain its residual value until the bit returns high again. If the PTM0 is in the Compare Match Output Mode, PWM output Mode or Single Pulse Output Mode then the PTM output pin will be reset to its initial condition, as specified by the PT0OC bit, when the PT0ON bit changes from low to high. Bit 2 ~ 0 Unimplemented, read as "0" PTM0C1 Register Name PT0M1 PT0M0 PT0IO1 PT0IO0 PT0OC PT0POL PT0CKS PT0CCLR PT0M1~PT0M0: Select PTM0 Operating Mode Bit 7 ~ 6 00: Compare Match Output Mode 01: Capture Input Mode 10: PWM Mode or Single Pulse Output Mode 11: Timer/Counter Mode These bits setup the required operating mode for the PTM0. To ensure reliable...
Page 88 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver In the Compare Match Output Mode, the PT0IO1~PT0IO0 bits determine how the PTM0 output pin changes state when a compare match occurs from the Comparator A. The PTM0 output pin can be setup to switch high, switch low or to toggle its present state when a compare match occurs from the Comparator A. When the PT0IO1~PT0IO0 bits are both zero, then no change will take place on the output. The initial value of the PTM0 output pin should be setup using the PT0OC bit in the PTM0C1 register. Note that the output level requested by the PT0IO1~PT0IO0 bits...
Page 89 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver PTM0DL Register Name D� D� Bit 7 ~ 0 PTM0 Counter Low Byte Register bit 7 ~ bit 0 PTM0 10-bit Counter bit 7 ~ bit 0 PTM0DH Register Name — — — — — — — — — — — — — — — — — — Bit 7 ~ 2 Unimplemented, read as "0"...
Page 90: Pe�Iodic T�Pe Tm Ope�Ating Modes
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver PTM0RPH Register Name — — — — — — — — — — — — — — — — — — Bit 7 ~ 2 Unimplemented, read as "0" Bit 1 ~ 0 PTM0 CCRP High Byte Register bit 1 ~ bit 0 PTM0 10-bit CCRP bit 9 ~ bit 8 Periodic Type TM Operating Modes The Periodic Type TM can operate in one of five operating modes, Compare Match Output Mode, PWM Output Mode, Single Pulse Output Mode, Capture Input Mode or Timer/Counter Mode. The...
Page 91 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Co�nte� ove�flow Co�nte� Val�e PT0CCLR = 0; PT0M [1:0] = 00 CCRP > 0 CCRP=0 Co�nte� clea�ed b� CCRP val�e 0x�FF CCRP > 0 Co�nte� Res�me Resta�t CCRP Pa�se Stop CCRA...
Page 92 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Co�nte� Val�e PT0CCLR = 1; PT0M [1:0] = 00 CCRA = 0 CCRA > 0 Co�nte� clea�ed b� CCRA val�e Co�nte� ove�flow 0x�FF CCRA=0 Res�me CCRA Pa�se Stop Co�nte� Resta�t CCRP...
Page 93: Pwm O�Tp�T Mode
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Timer/Counter Mode To select this mode, bits PT0M1 and PT0M0 in the PTM0C1 register should be set to 11 respectively. The Timer/Counter Mode operates in an identical way to the Compare Match Output Mode generating the same interrupt flags. The exception is that in the Timer/Counter Mode the PTM0 output pin is not used. Therefore the above description and Timing Diagrams for the Compare Match Output Mode can be used to understand its function. PWM Output Mode To select this mode, bits PT0M1 and PT0M0 in the PTM0C1 register should be set to 10 respectively. The PWM function within the PTM0 is useful for applications which require functions...
Page 94 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Co�nte� Val�e PT0M [1:0] = 10 Co�nte� clea�ed b� CCRP Co�nte� Reset when PT0ON �et��ns high CCRP Co�nte� Stop if Pa�se Res�me PT0ON bit low CCRA Time PT0ON PT0PAU PT0POL CCRA Int. Flag PTMA0F CCRP Int.
Page 95: Single P�Lse Mode
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Single Pulse Mode To select this mode, bits PT0M1 and PT0M0 in the PTM0C1 register should be set to 10 respectively and also the PT0IO1 and PT0IO0 bits should be set to 11 respectively. The Single Pulse Output Mode, as the name suggests, will generate a single shot pulse on the PTM0 output pin. The trigger for the pulse output leading edge is a low to high transition of the PT0ON bit, which can be implemented using the application program. However in the Single Pulse Mode, the PT0ON bit can also be made to automatically change from low to high using the external TCK1 pin, which will in turn initiate the Single Pulse output. When the PT0ON bit transitions to a high level, the counter will start running and the pulse leading edge will be generated. The PT0ON bit should remain high when the pulse is in its active state. The generated pulse trailing edge will be generated when the PT0ON bit is cleared to zero, which can be implemented using the application program or when a compare match occurs from Comparator A. However a compare match from Comparator A will also automatically clear the PT0ON bit and thus generate the Single Pulse output trailing edge. In this way the CCRA value can be used to control the...
Page 96 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Co�nte� Val�e PT0M [1:0] = 10 ; PT0IO [1:0] = 11 Co�nte� stopped b� CCRA Co�nte� Reset when PT0ON �et��ns high CCRA Co�nte� Stops Res�me Pa�se b� softwa�e CCRP Time PT0ON A�to.
Page 97: Capt
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Capture Input Mode To select this mode bits PT0M1 and PT0M0 in the PTM0C1 register should be set to 01 respectively. This mode enables external signals to capture and store the present value of the internal counter and can therefore be used for applications such as pulse width measurements. The external signal is supplied on the TP1_0, TP1_1 or TCK1 pin which is selected using the PT0CKS bit in the PTM0C1 register. The input pin active edge can be either a rising edge, a falling edge or both rising and falling edges; the active edge transition type is selected using the PT0IO1 and PT0IO0 bits in the PTM0C1 register. The counter is started when the PT0ON bit changes from low to high which is initiated using the application program. When the required edge transition appears on the TP1_0, TP1_1 or TCK1 pin the present value in the counter will be latched into the CCRA registers and a PTM0 interrupt generated. Irrespective of what events occur on the TP1_0, TP1_1 or TCK1 pin, the counter will continue to free run until the PT0ON bit changes from high to low. When a CCRP compare match occurs the counter will reset back to zero; in this way the CCRP value can be used to control the maximum counter value.
Page 98 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Co�nte� Val�e PT0M [1:0] = 01 Co�nte� clea�ed b� CCRP Co�nte� Co�nte� Stop Reset CCRP Res�me Pa�se Time PT0ON PT0PAU Active Active Active edge edge edge PTM0 capt��e pin TP1_0�TP1_1 o� TCK1 CCRA Int.
Page 99: Touch Key Function
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Touch Key Function Each device provides multiple touch key functions. The touch key function is fully integrated and requires no external components, allowing touch key functions to be implemented by the simple manipulation of internal registers. Touch Key Structure The touch keys are pin shared with the PA ~ PD logic I/O pins, with the desired function chosen via register bits. Keys are organised into several groups, with each group known as a module and having a module number, M0 to Mn. Each module is a fully independent set of four Touch Keys and each Touch Key has its own oscillator. Each module contains its own control logic circuits and register set. Examination of the register names will reveal the module number it is referring to. Device Keys - n Touch Key Module Touch Key Shared I/O Pin Ke�1~Ke�4 PB0~PB� BS82B12A-� Ke��~Ke�8 PB4~PB7 Ke�9~Ke�12...
Page 100 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Register Name TKTMR D� D� TKC0 — TKRCOV TKST TKCFOV TK16OV TSCS TK16S1 TK16S0 TK16DL D� D� TK16DH D1� D1� TKC1 — — — — — — TKFS1 TKFS0 TKMn16DL D�...
Page 101 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TK16OV: Touch key module 16-bit counter overflow flag Bit 3 0: Not overflow 1: Overflow This bit must be cleared by application program. Bit 2 TSCS: Touch Key time slot counter select 0: Each Module uses its own time slot counter. 1: All Touch Key Module use Module 0 time slot counter. Bit 1~0 TK16S1~ TK16S0: The touch key module 16-bit counter clock source select 00: f 01: f 10: f 11: f TKC1 Register Name — — — — — — TKFS1 TKFS0 — — — —...
Page 102 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TKMn16DH Register Name D1� D1� Bit 7~0 Module n 16-bit counter high byte contents TKMnROL Register Name D� D� Bit 7~0 Reference OSC inernal capacitor select OSC inernal capacitor select : (TKMnRO[9:0] × 50pF) / 1024 TKMnROH Register Name — — — — — — — — — — — — —...
Page 103 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver MnSOF2 ~ MnSOF0: Slelecting key OSC and ref OSC frequency as C to F OSC is Bit 2~0 controlled by software 000: 1380kHz 001: 1500kHz 010: 1670kHz 011: 1830kHz 100: 2000kHz 101: 2230kHz 110: 2460kHz 111: 2740kHz The frequency which is mentioned here willl be changed when the external or internal capacitor is with different value. If the touch key operates at a frequency of 2MHz, users can adjust the frequency in scale when select other frequency. TKMnC1 Register Name MnTSS — MnROEN MnKOEN MnK4IO MnK�IO MnK2IO MnK1IO — — Bit 7 MnTSS: Time slot counter clock select...
Page 104: To�Ch Ke� Ope�Ation
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Touch Key Operation When a finger touches or is in proximity to a touch pad, the capacitance of the pad will increase. By using this capacitance variation to change slightly the frequency of the internal sense oscillator, touch actions can be sensed by measuring these frequency changes. Using an internal programmable divider the reference clock is used to generate a fixed time period. By counting a number of generated clock cycles from the sense oscillator during this fixed time period touch key actions can be determined. Each touch key module contains four touch key inputs which are shared logical I/O pins, and the desired function is selected using register bits. Each touch key has its own independent sense...
Page 105 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver KEY 1 KEY 2 M�lti- 16-bit C/F MUX. Filte� Ove�flow f�eq�enc� co�nte� KEY � KEY 4 �f /2�f /4�f 16-bit co�nte� Ove�flow TK16S1~TK16S0 MnTSS üüü 8-bit time slot �-bit time slot MUX.
Page 106 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver The touch key sense oscilltor and reference oscillator timing diagram is shown in the following figure: TKST MnKOEN MnROEN Ha�dwa�e clea� to "0" KEY OSC CLK Refe�ence OSC CLK (2�6-TKTMR) ove�flow *�2 enable CFTMCK (MnDFEN=0) CFTMCK (MnDFEN=1) CFTMCK TKRCOV Set To�ch Ke� inte��pt �eq�est flag...
Page 107: To�Ch Ke� Inte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Touch Key Interrupt The touch key only has single interrupt, when the time slot counter in all the touch key modules or in the touch key module 0 overflows, an actual touch key interrupt will take place. The touch keys mentioned here are the keys which are enabled. The 16-bit C/F counter, 16-bit counter, 5-bit time slot counter and 8-bit time slot counter in all modules will be automatically cleared. The TKCFOV flag, which is the 16-bit C/F counter overflow flag will go high when any of the Touch Key Module 16-bit C/F counter overflows. As this flag will not be automatically cleared, it has to be cleared by the application program. Module 0 only contains one 16-bit counter. The TK16OV flag, which is the 16-bit counter overflow flag, will go high when the 16-bit counter overflows. As this flag will not be automatically cleared, it has to be cleared by the application program. More details regarding the touch key interrupt is located in the interrupt section of the datasheet. Programming Considerations After the relevant registers are setup, the touch key detection process is initiated the changing the TKST bit from low to high. This will enable and synchronise all relevant oscillators. The TKRCOV flag, which is the time slot counter flag will go high and remain high until the counter overflows. When this happens an interrupt signal will be generated. When the external touch key size and layout are defined, their related capacitances will then determine the sensor oscillator frequency.
Page 108: I 2 C Interface
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver C Interface The I C interface is used to communicate with external peripheral devices such as sensors, EEPROM memory etc. Originally developed by Philips, it is a two line low speed serial interface for synchronous serial data transfer. The advantage of only two lines for communication, relatively simple communication protocol and the ability to accommodate multiple devices on the same bus has made it an extremely popular interface type for many applications. V D D S D A S C L D e v i c e...
Page 109: I 2 C Registe�S
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver S T A R T s i g n a l f r o m M a s t e r S e n d s l a v e a d d r e s s...
Page 110 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver The I C function could be turned off or turned on by controlling the bit IICEN. When the pin- shared I/O ports are chosen to be the functions other than SDA and SCL by clearing the IICEN bit to zero, the I C function is turned off and its operating current will be reduced to a minimum value. In contrary, the I C function is turned on when the pin-shared I/O ports are chosen to be the SDA and SCL pins by setting the IICEN bit high. IICC1 Register Name IICHCF IICHAAS IICHBB IICHTX IICTXAK IICSRW IICAMWU IICRXAK Bit 7 IICHCF: I C Bus data transfer completion flag 0: Data is being transferred 1: Completion of an 8-bit data transfer The IICHCF flag is the data transfer flag. This flag will be zero when data is being transferred. Upon completion of an 8-bit data transfer the flag will go high and an interrupt will be generated. Below is an example of the flow of a two-byte I C data transfer.
Page 111 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver IICSRW: I Bit 2 C Slave Read/Write flag 0: Slave device should be in receive mode 1: Slave device should be in transmit mode The IICSRW flag is the I C Slave Read/Write flag. This flag determines whether the master device wishes to transmit or receive data from the I C bus. When the...
Page 112: I 2 C B�S Comm�Nication
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver The IICD register is used to store the data being transmitted and received. Before the device writes data to the I C bus, the actual data to be transmitted must be placed in the IICD register. After the data is received from the I C bus, the device can read it from the IICD register. Any transmission or reception of data from the I C bus must be made via the IICD register. IICD Register Name IICD7 IICD6 IICD� IICD4 IICD� IICD2 IICD1 IICD0 "x" �nknown IICA Register Name IICA6 IICA� IICA4 IICA� IICA2 IICA1 IICA0 —...
Page 113: I 2 C B�S Sta�T Signal
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver S t a r t S E T I I C E N W r i t e S l a v e A d d r e s s t o I I C A...
Page 114: I 2 C B�S Read/W�Ite Signal
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver C Bus Read/Write Signal The IICSRW bit in the IICC1 register defines whether the slave device wishes to read data from the C bus or write data to the I C bus. The slave device should examine this bit to determine if it is to be a transmitter or a receiver. If the IICSRW flag is "1" then this indicates that the master device wishes to read data from the I C bus, therefore the slave device must be setup to send data to the I bus as a transmitter. If the IICSRW flag is "0" then this indicates that the master wishes to send data to the I C bus, therefore the slave device must be setup to read data from the I C bus as a receiver. C Bus Slave Address Acknowledge Signal After the master has transmitted a calling address, any slave device on the I C bus, whose own internal address matches the calling address, must generate an acknowledge signal. The acknowledge signal will inform the master that a slave device has accepted its calling address. If no acknowledge signal is received by the master then a STOP signal must be transmitted by the master to end the communication. When the IICHAAS flag is high, the addresses have matched and the slave device must check the IICSRW flag to determine if it is to be a transmitter or a receiver. If the IICSRW flag is high, the slave device should be setup to be a transmitter so the IICHTX bit in the IICC1 register should be set high. If the IICSRW flag is low, then the microcontroller slave device should be setup as a receiver and the IICHTX bit in the IICC1 register should be cleared to zero. C Bus Data and Acknowledge Signal The transmitted data is 8-bits wide and is transmitted after the slave device has acknowledged receipt of its slave address. The order of serial bit transmission is the MSB first and the LSB last.
Page 115 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver S t a r t S l a v e A d d r e s s I I C S R W A C K S C L S D A...
Page 116: I 2 C Time-O�T Cont�Ol
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver C Time-out Control In order to reduce the problem of I C lockup due to reception of erroneous clock sources, a time-out function is provided. If the clock source to the I C is not received for a while, then the I C circuitry and registers will be reset after a certain time-out period. The time-out counter starts counting on an C bus "START" & "address match" condition, and is cleared by an SCL falling edge. Before the next SCL falling edge arrives, if the time elapsed is greater than the time-out setup by the I2CTOC register, then a time-out condition will occur. The time-out function will stop when an I C "STOP" condition occurs. I I C S R W S t a r t S l a v e A d d r e s s...
Page 117: Uart Interface
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver UART Interface The devices contain an integrated full-duplex asynchronous serial communications UART interface that enables communication with external devices that contain a serial interface. The UART function has many features and can transmit and receive data serially by transferring a frame of data with eight or nine data bits per transmission as well as being able to detect errors when the data is overwritten or incorrectly framed. The UART function possesses its own internal interrupt which can be used to indicate when a reception occurs or when a transmission terminates. The integrated UART function contains the following features: • Full-duplex, Universal Asynchronous Receiver and Transmitter (UART) communication • 8 or 9 bits character length • Even, odd or no parity options...
Page 118: Uart Data T�Ansfe� Scheme
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver UART Data Transfer Scheme The block diagram shows the overall data transfer structure arrangement for the UART interface. The actual data to be transmitted from the MCU is first transferred to the TXR register by the application program. The data will then be transferred to the Transmit Shift Register from where it will be shifted out, LSB first, onto the TX pin at a rate controlled by the Baud Rate Generator. Only the TXR register is mapped onto the MCU Data Memory, the Transmit Shift Register is not mapped and is therefore inaccessible to the application program. Data to be received by the UART is accepted on the external RX pin, from where it is shifted in, LSB first, to the Receiver Shift Register at a rate controlled by the Baud Rate Generator. When the shift register is full, the data will then be transferred from the shift register to the internal RXR register, where it is buffered and can be manipulated by the application program. Only the RXR register is mapped onto the MCU Data Memory, the Receiver Shift Register is not mapped and is therefore inaccessible to the application program. It should be noted that the actual register for data transmission and reception, although referred to in the text, and in application programs, as separate TXR and RXR registers, only exists as a single shared register in the Data Memory. This shared register known as the TXR_RXR register is used for both data transmission and data reception. T�ansmitte� Shift Registe� Receive� Shift Registe� TX Pin RX Pin …………………………...
Page 119 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver USR register The USR register is the status register for the UART, which can be read by the program to determine the present status of the UART. All flags within the USR register are read only. Further explanation on each of the flags is given below. Name PERR FERR OERR RIDLE RXIF TIDLE TXIF PERR: Parity error flag Bit 7 0: No parity error is detected 1: Parity error is detected The PERR flag is the parity error flag. When this read only flag is "0", it indicates a parity error has not been detected. When the flag is "1", it indicates that the parity of the received word is incorrect. This error flag is applicable only if Parity mode (odd or even) is selected. The flag can also be cleared by a software sequence which involves a read to the status register USR followed by an access to the RXR data register. Bit 6 NF: Noise flag 0: No noise is detected 1: Noise is detected The NF flag is the noise flag. When this read only flag is "0", it indicates no noise condition. When the flag is "1", it indicates that the UART has detected noise on the receiver input. The NF flag is set during the same cycle as the RXIF flag but will not be set in the case of as overrun. The NF flag can be cleared by a software sequence which will involve a read to the status register USR followed by an access to the RXR data register.
Page 120 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Bit 2 RXIF: Receive RXR data register status 0: RXR data register is empty 1: RXR data register has available data The RXIF flag is the receive data register status flag. When this read only flag is "0", it indicates that the RXR read data register is empty. When the flag is "1", it indicates that the RXR read data register contains new data. When the contents of the shift register are transferred to the RXR register, an interrupt is generated if RIE=1 in the UCR2 register. If one or more errors are detected in the received word, the appropriate receive-related flags NF, FERR, and/or PERR are set within the same clock cycle. The RXIF flag is cleared when the USR register is read with RXIF set, followed by a read from the RXR register, and if the RXR register has no data available. Bit 1 TIDLE: Transmission idle 0: Data transmission is in progress (data being transmitted) 1: No data transmission is in progress (transmitter is idle) The TIDLE flag is known as the transmission complete flag. When this read only flag is "0", it indicates that a transmission is in progress. This flag will be set to "1" when the TXIF flag is "1" and when there is no transmit data or break character being transmitted. When TIDLE is equal to "1", the TX pin becomes idle with the pin state in logic high condition. The TIDLE flag is cleared by reading the USR register with TIDLE set and then writing to the TXR register. The flag is not generated when a data character or a break is queued and ready to be sent. TXIF: Transmit TXR data register status Bit 0 0: Character is not transferred to the transmit shift register 1: Character has transferred to the transmit shift register (TXR data register is empty) The TXIF flag is the transmit data register empty flag. When this read only flag is "0", it indicates that the character is not transferred to the transmitter shift register. When...
Page 121 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver UCR1 register The UCR1 register together with the UCR2 register are the two UART control registers that are used to set the various options for the UART function, such as overall on/off control, parity control, data transfer bit length etc. Further explanation on each of the bits is given below. Name UARTEN PREN STOPS TXBRK "x" �nknown Bit 7 UARTEN: UART function enable control 0: Disable UART. TX and RX pins are as I/O or other pin-shared functional pins 1: Enable UART. TX and RX pins function as UART pins The UARTEN bit is the UART enable bit. When this bit is equal to "0", the UART will be disabled and the RX pin as well as the TX pin will be as General Purpose I/ O or other pin-shared functional pins. When the bit is equal to "1", the UART will be enabled and the TX and RX pins will function as defined by the TXEN and RXEN enable control bits. When the UART is disabled, it will empty the buffer so any character remaining in the buffer will be discarded. In addition, the value of the baud rate counter will be reset. If the UART is disabled, all error and status flags will be reset. Also the TXEN, RXEN, TXBRK, RXIF, OERR, FERR, PERR and NF bits will be cleared, while the TIDLE, TXIF and RIDLE bits will be set. Other control bits in UCR1, UCR2 and BRG registers will remain unaffected. If the UART is active and the UARTEN bit is cleared, all pending transmissions and receptions will be terminated and the module will be reset as defined above. When the UART is re-enabled, it will restart in the same configuration. Bit 6...
Page 122 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TXBRK: Transmit break character Bit 2 0: No break character is transmitted 1: Break characters transmit The TXBRK bit is the Transmit Break Character bit. When this bit is "0", there are no break characters and the TX pin operates normally. When the bit is "1", there are transmit break characters and the transmitter will send logic zeros. When this bit is equal to "1", after the buffered data has been transmitted, the transmitter output is held low for a minimum of a 13-bit length and until the TXBRK bit is reset. Bit 1 RX8: Receive data bit 8 for 9-bit data transfer format (read only) This bit is only used if 9-bit data transfers are used, in which case this bit location will store the 9th bit of the received data known as RX8. The BNO bit is used to determine whether data transfers are in 8-bit or 9-bit format. Bit 0 TX8: Transmit data bit 8 for 9-bit data transfer format (write only) This bit is only used if 9-bit data transfers are used, in which case this bit location will store the 9th bit of the transmitted data known as TX8. The BNO bit is used to determine whether data transfers are in 8-bit or 9-bit format. UCR2 register The UCR2 register is the second of the two UART control registers and serves several purposes. One of its main functions is to control the basic enable/disable operation of the UART Transmitter and Receiver as well as enabling the various UART interrupt sources. The register also serves to control the baud rate speed, receiver wake-up enable and the address detect enable. Further explanation on each of the bits is given below. Name TXEN RXEN BRGH ADDEN...
Page 123 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver BRGH: Baud Rate speed selection Bit 5 0: Low speed baud rate 1: High speed baud rate The bit named BRGH selects the high or low speed mode of the Baud Rate Generator. This bit, together with the value placed in the baud rate register BRG, controls the Baud Rate of the UART. If this bit is equal to "1", the high speed mode is selected. If the bit is equal to "0", the low speed mode is selected. ADDEN: Address detect function enable control Bit 4 0: Address detection function is disabled 1: Address detection function is enabled The bit named ADDEN is the address detect function enable control bit. When this bit is equal to "1", the address detect function is enabled. When it occurs, if the 8th bit, which corresponds to RX7 if BNO=0 or the 9th bit, which corresponds to RX8 if BNO=1, has a value of "1", then the received word will be identified as an address, rather than data. If the corresponding interrupt is enabled, an interrupt request will be generated each time the received word has the address bit set, which is the 8th or 9th bit depending on the value of BNO. If the address bit known as the 8th or 9th bit of the received word is "0" with the address detect function being enabled, an interrupt will not be generated and the received data will be discarded. Bit 3 WAKE: RX pin falling edge wake-up function enable control 0: RX pin wake-up function is disabled 1: RX pin wake-up function is enabled This bit enables or disables the receiver wake-up function. If this bit is equal to "1" and the device is in the IDLE0 or SLEEP mode, a falling edge on the RX input pin will wake-up the device. If this bit is equal to "0" and the device is in the IDLE or SLEEP mode, any edge transitions on the RX pin will not wake-up the device. Bit 2 RIE: Receiver interrupt enable control...
Page 124: Ba�D Rate Gene�Ato
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TXR_RXR register The TXR_RXRn register is the data register which is used to store the data to be transmitted on the TXn pin or being received from the RXn pin. Name TXRX7 TXRX6 TXRX� TXRX4 TXRX� TXRX2 TXRX1 TXRX0 "x" �nknown TXRX7~TXRX0: UART Transmit/Receive Data bit 7 ~ bit 0 Bit 7~0 Baud Rate Generator To setup the speed of the serial data communication, the UART function contains its own dedicated baud rate generator. The baud rate is controlled by its own internal free running 8-bit timer, the period of which is determined by two factors. The first of these is the value placed in the baud rate register BRG and the second is the value of the BRGH bit with the control register UCR2. The BRGH bit decides if the baud rate generator is to be used in a high speed mode or low speed mode, which in turn determines the formula that is used to calculate the baud rate. The value in the BRG register, N, which is used in the following baud rate calculation formula determines the division factor. Note that N is the decimal value placed in the BRG register and has a range of between 0 and 255. UCR2 BRGH Bit Ba�d Rate (BR)
Page 125 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Calculating the Baud Rate and Error Values For a clock frequency of 4MHz, and with BRGH set to "0" determine the BRG register value N, the actual baud rate and the error value for a desired baud rate of 4800. From the above table the desired baud rate BR = f / [64 (N+1)] Re-arranging this equation gives N = [f / (BR×64)] - 1 Giving a value for N = [4000000 / (4800×64)] - 1 = 12.0208 To obtain the closest value, a decimal value of 12 should be placed into the BRG register. This gives an actual or calculated baud rate value of BR = 4000000 / [64× (12 + 1)] = 4808 Therefore the error is equal to (4808 - 4800) / 4800 = 0.16% The following table shows actual values of baud rate and error values for the two values of BRGH. =8MHz Baud Rate Baud Rates for BRGH=0 Baud Rates for BRGH=1 K/BPS Kbaud...
Page 126 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Enabling/Disabling the UART Interface The basic on/off function of the internal UART function is controlled using the UARTEN bit in the UCR1 register. If the UARTEN, TXEN and RXEN bits are set, then these two UART pins will act as normal TX output pin and RX input pin respectively. If no data is being transmitted on the TX pin, then it will default to a logic high value. Clearing the UARTEN bit will disable the TX and RX pins and allow these two pins to be used as normal I/O or other pin-shared functional pins. When the UART function is disabled the buffer will be reset to an empty condition, at the same time discarding any remaining residual data. Disabling the UART will also reset the error and status flags with bits TXEN, RXEN, TXBRK, RXIF, OERR, FERR, PERR and NF being cleared while bits TIDLE, TXIF and RIDLE will be set. The remaining control bits in the UCR1, UCR2 and BRG registers will remain unaffected. If the UARTEN bit in the UCR1 register is cleared while the UART is active, then all pending transmissions and receptions will be immediately suspended and the UART will be reset to a condition as defined above. If the UART is then subsequently re-enabled, it will restart again in the same configuration. Data, Parity and Stop Bit Selection The format of the data to be transferred is composed of various factors such as data bit length, parity on/off, parity type, address bits and the number of stop bits. These factors are determined by the setup of various bits within the UCR1 register. The BNO bit controls the number of data bits which can be set to either 8 or 9, the PRT bit controls the choice of odd or even parity, the PREN bit controls the parity on/off function and the STOPS bit decides whether one or two stop bits are to be used. The following table shows various formats for data transmission. The address bit identifies the frame as an address character. The number of stop bits, which can be either one or two, is independent of the data length and are only to be used for Transmitter. There is only one stop bit for Receiver.
Page 127: Uart T�Ansmitte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver UART Transmitter Data word lengths of either 8 or 9 bits can be selected by programming the BNO bit in the UCR1 register. When BNO bit is set, the word length will be set to 9 bits. In this case the 9th bit, which is the MSB, needs to be stored in the TX8 bit in the UCR1 register. At the transmitter core lies the Transmitter Shift Register, more commonly known as the TSR, whose data is obtained from the transmit data register, which is known as the TXR register. The data to be transmitted is loaded into this TXR register by the application program. The TSR register is not written to with new data until the stop bit from the previous transmission has been sent out. As soon as this stop bit has been transmitted, the TSR can then be loaded with new data from the TXR register, if it is available. It should be noted that the TSR register, unlike many other registers, is not directly mapped into the Data Memory area and as such is not available to the application program for direct read/write operations. An actual transmission of data will normally be enabled when the TXEN bit is set, but the data will not be transmitted until the TXR register has been loaded with data and the baud rate generator has defined a shift clock source. However, the transmission can also be initiated by first loading data into the TXR register, after which the TXEN bit can be set. When a transmission of data begins, the TSR is normally empty, in which case a transfer to the TXR register will result in an immediate transfer to the TSR. If during a transmission the TXEN bit is cleared, the transmission will immediately cease and the transmitter will be reset. The TX output pin will then return to the I/ O or other pin-shared function. Transmitting Data When the UART is transmitting data, the data is shifted on the TX pin from the shift register, with the least significant bit first. In the transmit mode, the TXR register forms a buffer between the internal bus and the transmitter shift register. It should be noted that if 9-bit data format has been selected, then the MSB will be taken from the TX8 bit in the UCR1 register. The steps to initiate a data transfer can be summarized as follows: • Make the correct selection of the BNO, PRT, PREN and STOPS bits to define the required word length, parity type and number of stop bits. • Setup the BRG register to select the desired baud rate.
Page 128: Uart Receive
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Transmit Break If the TXBRK bit is set then break characters will be sent on the next transmission. Break character transmission consists of a start bit, followed by 13×N ‘0’ bits and stop bits, where N=1, 2, etc. If a break character is to be transmitted then the TXBRK bit must be first set by the application program and then cleared to generate the stop bits. Transmitting a break character will not generate a transmit interrupt. Note that a break condition length is at least 13 bits long. If the TXBRK bit is continually kept at a logic high level then the transmitter circuitry will transmit continuous break characters. After the application program has cleared the TXBRK bit, the transmitter will finish transmitting the last break character and subsequently send out one or two stop bits. The automatic logic highs at the end of the last break character will ensure that the start bit of the next frame is recognized. UART Receiver The UART is capable of receiving word lengths of either 8 or 9 bits can be selected by programming the BNO bit in the UCR register. If the BNO bit is set, the word length will be set to 9 bits with the MSB being stored in the RX8 bit of the UCR1 register. At the receiver core lies the Receive Serial Shift Register, commonly known as the RSR. The data which is received on the RX external input pin is sent to the data recovery block. The data recovery block operating speed is 16 times that of the baud rate, while the main receive serial shifter operates at the baud rate. After the RX pin is sampled for the stop bit, the received data in RSR is transferred to the receive data register, if the register is empty. The data which is received on the external RX input pin is sampled three times by a majority detect circuit to determine the logic level that has been placed onto the RX pin. It should be noted that the RSR register, unlike many other registers, is not directly mapped into the Data Memory area and as such is not available to the application program for direct read/write operations. Receiving Data When the UART receiver is receiving data, the data is serially shifted in on the external RX input pin to the shift register, with the least significant bit LSB first. The RXR register is a two byte deep FIFO data buffer, where two bytes can be held in the FIFO while a third byte can continue to be received. Note that the application program must ensure that the data is read from RXR before the third byte has been completely shifted in, otherwise this third byte will be discarded and an overrun error OERR will be subsequently indicated. The steps to initiate a data transfer can be summarized as follows:...
Page 129: Managing Receive� E
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Receive Break Any break character received by the UART will be managed as a framing error. The receiver will count and expect a certain number of bit times as specified by the values programmed into the BNO and one STOPS bit. If the break is much longer than 13 bit times, the reception will be considered as complete after the number of bit times specified by BNO and one STOP bit. The RXIF bit is set, FERR is set, zeros are loaded into the receive data register, interrupts are generated if appropriate and the RIDLE bit is set. If a long break signal has been detected and the receiver has received a start bit, the data bits and the invalid stop bit, which sets the FERR flag, the receiver must wait for a valid stop bit before looking for the next start bit. The receiver will not make the assumption that the break condition on the line is the next start bit. A break is regarded as a character that contains only zeros with the FERR flag set. The break character will be loaded into the buffer and no further data will be received until stop bits are received. It should be noted that the RIDLE read only flag will go high when the stop bits have not yet been received. The reception of a break character on the UART registers will result in the following: • The framing error flag, FERR, will be set. • The receive data register, RXR, will be cleared. • The OERR, NF, PERR, RIDLE or RXIF flags will possibly be set. Idle Status When the receiver is reading data, which means it will be in between the detection of a start bit and the reading of a stop bit, the receiver status flag in the USR register, otherwise known as the RIDLE flag, will have a zero value. In between the reception of a stop bit and the detection of the next start bit, the RIDLE flag will have a high value, which indicates the receiver is in an idle condition. Receiver Interrupt The read only receive interrupt flag RXIF in the USR register is set by an edge generated by the receiver. An interrupt is generated if RIE bit is "1", when a word is transferred from the Receive Shift Register, RSR, to the Receive Data Register, RXR. An overrun error can also generate an...
Page 130 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Noise Error – NF Flag Over-sampling is used for data recovery to identify valid incoming data and noise. If noise is detected within a frame the following will occur: • The read only noise flag, NF, in the USR register will be set on the rising edge of the RXIF bit. • Data will be transferred from the Shift register to the RXR register. • No interrupt will be generated. However this bit rises at the same time as the RXIF bit which itself generates an interrupt. Note that the NF flag is reset by a USR register read operation followed by an RXR register read operation.
Page 131 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Note that the USR register flags are read only and cannot be cleared or set by the application program, neither will they be cleared when the program jumps to the corresponding interrupt servicing routine, as is the case for some of the other interrupts. The flags will be cleared...
Page 132: Uart Powe� Down And Wake
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver UART Power Down and Wake-up When the the device system clock is switched off, the UART will cease to function. If the device executes the "HALT" instruction and switches off the system clock while a transmission is still in progress, then the transmission will be paused until the UART clock source derived from the microcontroller is activated. In a similar way, if the device executes the "HALT" instruction and switches off the system clock while receiving data, then the reception of data will likewise be paused. When the device enters the IDLE or SLEEP Mode, note that the USR, UCR1, UCR2, transmit and receive registers, as well as the BRG register will not be affected. It is recommended...
Page 133: Interrupts
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Interrupts Interrupts are an important part of any microcontroller system. When an external event or an internal function such as a Touch Action or Timer/Event Counter overflow requires microcontroller attention, their corresponding interrupt will enforce a temporary suspension of the main program allowing the microcontroller to direct attention to their respective needs. The devices contain several external interrupt and internal interrupt functions. The external interrupt is generated by the action of the external INT pin and Touch Keys, while the internal interrupts are generated by various internal functions such as Timer Modules, Time Bases, I C, LVD, EEPROM and UART. Interrupt Registers Overall interrupt control, which basically means the setting of request flags when certain...
Page 134 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver INTEG Register Name — — — — — — INTS1 INTS0 — — — — — — — — — — — — Bit 7 ~ 2 Unimplemented, read as "0" Bit 1 ~ 0 INTS1, INTS0: Defines INT interrupt active edge 00: Disabled interrupt 01: Rising Edge interrupt 10: Falling Edge interrupt...
Page 135 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CTMA0F: CTM0 CCRA comparator interrupt request flag Bit 5 0: No request 1: Interrupt request CTMP0F: CTM0 CCRP comparator interrupt request flag Bit 4 0: No request 1: Interrupt request Bit 3 PTMA0E: PTM0 CCRA comparator interrupt control 0: Disable 1: Enable Bit 2 PTMP0E: PTM0 CCRP comparator interrupt control 0: Disable 1: Enable Bit 1 CTMA0E: CTM0 CCRA comparator interrupt control 0: Disable 1: Enable Bit 0 CTMP0E: CTM0 CCRP comparator interrupt control 0: Disable 1: Enable INTC2 Register Name UARTF IICF TB1F UARTE...
Page 136 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver INTC3 Register Name — — — LVDF — — — LVDE — — — — — — — — — — — — Bit 7~5 Unimplemented, read as "0" Bit 4 LVDF: LVD interrupt request flag 0: No request 1: Interrupt request Bit 3~1 Unimplemented, read as "0"...
Page 137: Inte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver EMI a�to disabled in ISR Legend Inte��pt Req�est Enable Maste� P�io�it� Vecto� Req�est Flag� a�to �eset in ISR Name Flags Bits Enable High INT Pin INTF INTE Enable Bits To�ch Ke� Mod�le...
Page 138: Time Base Inte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Time Base Interrupts The function of the Time Base Interrupt is to provide regular time signal in the form of an internal interrupt. It is controlled by the overflow signal from its timer function. When this happens its interrupt request flags TBnF will be set. To allow the program to branch to its interrupt vector address, the global interrupt enable bit, EMI and Time Base enable bit, TBnE, must first be set. When the interrupt is enabled, the stack is not full and the Time Base overflows, a subroutine call to its vector location will take place. When the interrupt is serviced, the interrupt request flag, TBnF, will be automatically reset and the EMI bit will be cleared to disable other interrupts. The purpose of the Time Base Interrupt is to provide an interrupt signal at fixed time periods. Each Time Base clock source originates from an independent internal prescaler. Each 15-bit prescaler can source from f /4, f or f , selected by CLKSELn1~CLKSELn0 SUB bits in the PSCR register. PSCR Register Name — — CLKSEL11 CLKSEL10 — — CLKSEL01 CLKSEL00 — —...
Page 139: Tm Inte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TB0ON: Time Base 0 enable/disable control Bit 3 0: Disable 1: Enable TB02 ~ TB00: Select Time Base 1 Time-out Period Bit 2~0 000: 2 001: 2 010: 2 011: 2 100: 2 101: 2 110: 2 111: 2 Prescaler Time Base n Interrupt TBnON TBn[2:0 ] CLKSELn[1:0 ] Time Base Structure (n=0 or 1) TM Interrupts The Compact and Periodic type TMs each has two internal interrupts, the internal comparator A or comparator P, which generates a TM interrupt when a compare match condition occurs. For each of the Compact and Periodic Type TMs, there are two interrupt request flags, CTMP0F/CTMA0F and PTMP0F/PTMA0F, and two enable bits, CTMP0E/CTMA0E and PTMP0E/PTMA0E. A TM...
Page 140: Lvd Inte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver LVD Interrupt An LVD Interrupt request will take place when the LVD Interrupt request flag, LVDF, is set, which occurs when the Low Voltage Detector function detects a low power supply voltage. To allow the program to branch to its respective interrupt vector address, the global interrupt enable bit, EMI, and Low Voltage Interrupt enable bit, LVDE, must first be set. When the interrupt is enabled, the stack is not full and a low voltage condition occurs, a subroutine call to the LVD Interrupt vector, will take place. When the Low Voltage Interrupt is serviced, the LVDF flag will be automatically cleared and the EMI bit will be automatically cleared to disable other interrupts. Touch Key Interrupt For a Touch Key interrupt to occur, the global interrupt enable bit, EMI, and the Touch Key interrupt enable TKME must be first set. An actual Touch Key interrupt will take place when the Touch Key request flag. TKMF, is set, a situation that will occur when the time slot counter overflows. When the interrupt is enabled, the stack is not full and the Touch Key time slot counter overflow occurs, a subroutine call to the relevant timer interrupt vector, will take place. When the interrupt is serviced, the Touch Key interrupt request flag, TKMF, will be automatically reset and the EMI bit will be automatically cleared to disable other interrupts. C Interrupt An I C Interrupt request will take place when the I C Interrupt request flag, IICF, is set, which occurs when an address match occurs, or an I C communication time-out occurs, or a byte of data has been received or transmitted by the I C interface. To allow the program to branch to its respective interrupt vector address, the global interrupt enable bit, EMI, and the I C Interface Interrupt enable bit, IICE, must first be set. When the interrupt is enabled, the stack is not full and any these...
Page 141: Inte
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Interrupt Wake-up Function Each of the interrupt functions has the capability of waking up the microcontroller when in the SLEEP or IDLE Mode. A wake-up is generated when an interrupt request flag changes from low to high and is independent of whether the interrupt is enabled or not. Therefore, even though the device is in the SLEEP or IDLE Mode and its system oscillator stopped, situations such as external edge transitions on the external interrupt pin or a low power supply voltage may cause their respective interrupt flag to be set high and consequently generate an interrupt. Care must therefore be taken if spurious wake-up situations are to be avoided. If an interrupt wake-up function is to be disabled then the corresponding interrupt request flag should be set high before the device enters the SLEEP or IDLE Mode. The interrupt enable bits have no effect on the interrupt wake-up function. Programming Considerations By disabling the relevant interrupt enable bits, a requested interrupt can be prevented from being serviced, however, once an interrupt request flag is set, it will remain in this condition in the interrupt register until the corresponding interrupt is serviced or until the request flag is cleared by the application program.
Page 142: Scom And Sseg Function For Lcd
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver SCOM and SSEG Function for LCD The devices have the capability of driving external LCD panels. The common pins for LCD driving, SCOM0~SCOM3, SSEG0~SSEG19, are pin shared with certain pins on the I/O ports. The LCD signals (COM and SEG) are generated using the application program. LCD Operation An external LCD panel can be driven using the devices by configuring the I/O pins as common pins and configuring the I/O pins as segment pins. The LCD driver function is controlled using the LCD control registers which in addition to controlling the overall on/off function also controls the SCOM and SSEG operating current. This enables the LCD COM and SEG driver to generate the necessary , (1/3)V , (2/3)V voltage and V levels for LCD 1/3 bias operation. The LCDEN bit in the SLCDC0 register is the overall master control for the LCD driver, however this bit is used in conjunction with the COMnEN and SEGnEN bits to select which I/O Port pins are used for LCD driving. Note that the Port Control register does not need to first setup the pins as outputs to enable the LCD driver operation. LCD Driver Structure Rev. 1.20 �an�a�� 2�� 201�...
Page 143 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver The accompanying waveform diagram shows a typical 1/3 Bias LCD waveform generated using the application program. Note that the depiction of a "1" in the diagram illustrates an illuminated LCD pixel. The COM signal polarity generated on pins SCOM0~SCOM3, whether 0 or 1, are generated using the corresponding I/O data register bits, which are bits PA0~PA2, PA4 in the PA register. Note: The logical values shown in the diagram are the PA I/O register bit values, PA0~PA2, PA4. 1/3 Bias LCD Waveform Rev. 1.20 14� �an�a�� 2�� 201�...
Page 144: Lcd Bias Cont�Ol
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver A cyclic LCD waveform includes two frames, known as Frame 0 and Frame 1 for which the following offers a functional explanation. In Frame 0 To select Frame 0 clear the FRAME bit to 0. In frame 0, the COM signal output can have a value of V , or have a V value of (1/3)V . The bias SEG signal can have a value of V , or have a V value of (2/3)V bias...
Page 145 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver SLCDC1 Register Name SEG7EN SEG6EN SEG�EN SEG4EN SEG�EN SEG2EN SEG1EN SEG0EN Bit 7~0 SEG7EN~SEG0EN: SSEG7 ~ SSEG0 or other function selection 0: Other function 1: SSEG7~SSEG0 SLCDC2 Register Name SEG1�EN SEG14EN SEG1�EN SEG12EN SEG11EN SEG10EN SEG9EN SEG8EN Bit 7~0 SEG15EN~SEG8EN: SSEG15 ~ SSEG8 or other function selection 0: Other function 1: SSEG15~SSEG8 SLCDC3 Register – BS82C16A-3/BS82D20A-3 Name —...
Page 146: Low Voltage Detector - Lvd
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Low Voltage Detector – LVD Each device has a Low Voltage Detector function, also known as LVD. This enables the device to monitor the power supply voltage, V , and provides a warning signal should it fall below a certain level. This function may be especially useful in battery applications where the supply voltage will gradually reduce as the battery ages, as it allows an early warning battery low signal to be generated. The Low Voltage Detector also has the capability of generating an interrupt signal. LVD Register The Low Voltage Detector function is controlled using a single register with the name LVDC. Three bits in this register, VLVD2~VLVD0, are used to select one of five fixed voltages below which a low voltage condition will be detemined. A low voltage condition is indicated when the LVDO bit is set. If the LVDO bit is low, this indicates that the V voltage is above the preset low voltage value. The LVDEN bit is used to control the overall on/off function of the low voltage detector. Setting the bit high will enable the low voltage detector. Clearing the bit to zero will switch off the internal low voltage detector circuits. As the low voltage detector will consume a certain amount of power, it may be desirable to switch off the circuit when not in use, an important consideration in power sensitive battery powered applications. LVDC Register Name — — LVDO LVDEN —...
Page 147: Lvd Ope�Ation
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver LVD Operation The Low Voltage Detector function operates by comparing the power supply voltage, V , with a pre-specified voltage level stored in the LVDC register. This has a range of between 2.7V and 4.0V. When the power supply voltage, V , falls below this pre-determined value, the LVDO bit will be set high indicating a low power supply voltage condition. The Low Voltage Detector function is supplied by a reference voltage which will be automatically enabled. When the device is in SLEEP mode the low voltage detector will be automatically disabled even if the LVDEN bit is high. After enabling the Low Voltage Detector, a time delay t should be allowed for the circuitry to stabilise LVDS before reading the LVDO bit. Note also that as the V voltage may rise and fall rather slowly, at the voltage nears that of V , there may be multiple bit LVDO transitions. V D D L V D L V D E N L V D O...
Page 148: Configuration Options
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Configuration Options Configuration options refer to certain options within the MCU that are programmed into the device during the programming process. During the development process, these options are selected using the HT-IDE software development tools. As these options are programmed into the device using the hardware programming tools, once they are selected they cannot be changed later using the application program. All options must be defined for proper system function, the details of which are shown in the table. Options Oscillator Option Low Speed S�stem Oscillato� Selection – f LIRC HIRC f�eq�enc� selection: 8MHz 12MHz 16MHz Note: 1. The low speed system oscillator selection is only for the BS82C16A-3 and BS82D20A-3. 2. When the HIRC has been configurated at a frequency shown in this table, the HIRCS1 and HIRCS0 bits is recommended to be setup to select the same frequency to keep the HIRC frequency accuracy spedified in the A.C. characteristics. Rev. 1.20...
Page 149: Application Circuit
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Application Circuit I/O Pins 0.1�F C Pins UART Pins SCOM&SSEG Pins KEY1 KEY2 Ci�c�it See Oscillato� KEYn Section Rev. 1.20 �an�a�� 2�� 201�...
Page 150: Instruction Set
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Instruction Set Introduction Central to the successful operation of any microcontroller is its instruction set, which is a set of program instruction codes that directs the microcontroller to perform certain operations. In the case of Holtek microcontroller, a comprehensive and flexible set of over 60 instructions is provided to enable programmers to implement their application with the minimum of programming overheads. For easier understanding of the various instruction codes, they have been subdivided into several functional groupings. Instruction Timing Most instructions are implemented within one instruction cycle. The exceptions to this are branch, call, or table read instructions where two instruction cycles are required. One instruction cycle is equal to 4 system clock cycles, therefore in the case of an 8MHz system oscillator, most instructions would be implemented within 0.5μs and branch or call instructions would be implemented within 1μs. Although instructions which require one more cycle to implement are generally limited to the JMP, CALL, RET, RETI and table read instructions, it is important to realize that any other instructions which involve manipulation of the Program Counter Low register or PCL will also take one more cycle to implement. As instructions which change the contents of the PCL will imply a direct jump to that new address, one more cycle will be required. Examples of such instructions would be "CLR PCL" or "MOV PCL, A". For the case of skip instructions, it must be noted that if the result of the comparison involves a skip operation then this will also take one more cycle, if no skip is involved then only one cycle is required. Moving and Transferring Data The transfer of data within the microcontroller program is one of the most frequently used operations. Making use of three kinds of MOV instructions, data can be transferred from registers to...
Page 151: Logical And Rotate Ope�Ation
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Logical and Rotate Operation The standard logical operations such as AND, OR, XOR and CPL all have their own instruction within the Holtek microcontroller instruction set. As with the case of most instructions involving data manipulation, data must pass through the Accumulator which may involve additional programming steps. In all logical data operations, the zero flag may be set if the result of the operation is zero. Another form of logical data manipulation comes from the rotate instructions such...
Page 152: Instruction Set Summary
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Instruction Set Summary The following table depicts a summary of the instruction set categorised according to function and can be consulted as a basic instruction reference using the following listed conventions. Table Conventions x: Bits immediate data m: Data Memory address A: Accumulator i: 0~7 number of bits addr: Program memory address Mnemonic Description Cycles Flag Affected Arithmetic ADD A�[m] Add Data Memo�� to ACC Z� C� AC� OV ADDM A�[m] Add ACC to Data Memo��...
Page 153 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Mnemonic Description Cycles Flag Affected Data Move MOV A�[m] Move Data Memo�� to ACC None MOV [m]�A Move ACC to Data Memo�� Note None MOV A�x Move immediate data to ACC...
Page 154: Instruction Definition
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Instruction Definition Add Data Memory to ACC with Carry ADC A,[m] Description The contents of the specified Data Memory, Accumulator and the carry flag are added. The result is stored in the Accumulator. Operation ACC ← ACC + [m] + C Affected flag(s) OV, Z, AC, C ADCM A,[m] Add ACC to Data Memory with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added. The result is stored in the specified Data Memory. Operation [m] ← ACC + [m] + C Affected flag(s) OV, Z, AC, C ADD A,[m] Add Data Memory to ACC Description The contents of the specified Data Memory and the Accumulator are added. The result is stored in the Accumulator. Operation ACC ← ACC + [m] Affected flag(s)
Page 155 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CALL addr Subroutine call Description Unconditionally calls a subroutine at the specified address. The Program Counter then increments by 1 to obtain the address of the next instruction which is then pushed onto the stack. The specified address is then loaded and the program continues execution from this new address. As this instruction requires an additional operation, it is a two cycle instruction. Operation Stack ← Program Counter + 1 Program Counter ← addr Affected flag(s) None CLR [m] Clear Data Memory Description Each bit of the specified Data Memory is cleared to 0. Operation [m] ← 00H Affected flag(s) None CLR [m].i Clear bit of Data Memory Description Bit i of the specified Data Memory is cleared to 0. Operation [m].i ← 0 Affected flag(s) None...
Page 156 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver CPLA [m] Complement Data Memory with result in ACC Description Each bit of the specified Data Memory is logically complemented (1′s complement). Bits which previously contained a 1 are changed to 0 and vice versa. The complemented result is stored in the Accumulator and the contents of the Data Memory remain unchanged. Operation ACC ← [m] Affected flag(s) DAA [m] Decimal-Adjust ACC for addition with result in Data Memory Description Convert the contents of the Accumulator value to a BCD (Binary Coded Decimal) value resulting from the previous addition of two BCD variables. If the low nibble is greater than 9 or if AC flag is set, then a value of 6 will be added to the low nibble. Otherwise the low nibble remains unchanged. If the high nibble is greater than 9 or if the C flag is set, then a value of 6 will be added to the high nibble. Essentially, the decimal conversion is performed by adding 00H, 06H, 60H or 66H depending on the Accumulator and flag conditions. Only the C flag may be affected by this instruction which indicates that if the original BCD sum is greater than 100, it allows multiple precision decimal addition. Operation [m] ← ACC + 00H or [m] ← ACC + 06H or [m] ← ACC + 60H or [m] ← ACC + 66H Affected flag(s) DEC [m] Decrement Data Memory Description Data in the specified Data Memory is decremented by 1.
Page 157 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver JMP addr Jump unconditionally Description The contents of the Program Counter are replaced with the specified address. Program execution then continues from this new address. As this requires the insertion of a dummy instruction while the new address is loaded, it is a two cycle instruction. Operation Program Counter ← addr Affected flag(s) None MOV A,[m] Move Data Memory to ACC Description The contents of the specified Data Memory are copied to the Accumulator. Operation ACC ← [m] Affected flag(s) None MOV A,x Move immediate data to ACC Description The immediate data specified is loaded into the Accumulator. Operation ACC ← x Affected flag(s) None MOV [m],A...
Page 158 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver RET A,x Return from subroutine and load immediate data to ACC Description The Program Counter is restored from the stack and the Accumulator loaded with the specified immediate data. Program execution continues at the restored address. Operation Program Counter ← Stack ACC ← x Affected flag(s) None RETI Return from interrupt Description The Program Counter is restored from the stack and the interrupts are re-enabled by setting the EMI bit. EMI is the master interrupt global enable bit. If an interrupt was pending when the RETI instruction is executed, the pending Interrupt routine will be processed before returning to the main program. Operation Program Counter ← Stack EMI ← 1 Affected flag(s) None RL [m] Rotate Data Memory left Description The contents of the specified Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0. Operation [m].(i+1) ← [m].i; (i=0~6) [m].0 ← [m].7...
Page 159 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver RRA [m] Rotate Data Memory right with result in ACC Description Data in the specified Data Memory and the carry flag are rotated right by 1 bit with bit 0 rotated into bit 7. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged. Operation ACC.i ← [m].(i+1); (i=0~6) ACC.7 ← [m].0 Affected flag(s) None Rotate Data Memory right through Carry RRC [m] Description The contents of the specified Data Memory and the carry flag are rotated right by 1 bit. Bit 0 replaces the Carry bit and the original carry flag is rotated into bit 7. Operation [m].i ← [m].(i+1); (i=0~6) [m].7 ← C C ← [m].0 Affected flag(s) RRCA [m] Rotate Data Memory right through Carry with result in ACC Description Data in the specified Data Memory and the carry flag are rotated right by 1 bit. Bit 0 replaces the Carry bit and the original carry flag is rotated into bit 7. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged. Operation ACC.i ← [m].(i+1); (i=0~6)
Page 160 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver SDZA [m] Skip if decrement Data Memory is zero with result in ACC Description The contents of the specified Data Memory are first decremented by 1. If the result is 0, the following instruction is skipped. The result is stored in the Accumulator but the specified Data Memory contents remain unchanged. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a two cycle instruction. If the result is not 0, the program proceeds with the following instruction. Operation ACC ← [m] − 1 Skip if ACC=0 Affected flag(s) None Set Data Memory SET [m] Description Each bit of the specified Data Memory is set to 1. Operation [m] ← FFH Affected flag(s) None SET [m].i Set bit of Data Memory Description Bit i of the specified Data Memory is set to 1. Operation [m].i ← 1 Affected flag(s)
Page 161 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver SUBM A,[m] Subtract Data Memory from ACC with result in Data Memory Description The specified Data Memory is subtracted from the contents of the Accumulator. The result is stored in the Data Memory. Note that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1. Operation [m] ← ACC − [m] Affected flag(s) OV, Z, AC, C SUB A,x Subtract immediate data from ACC Description The immediate data specified by the code is subtracted from the contents of the Accumulator. The result is stored in the Accumulator. Note that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1. Operation ACC ← ACC − x Affected flag(s) OV, Z, AC, C SWAP [m] Swap nibbles of Data Memory Description The low-order and high-order nibbles of the specified Data Memory are interchanged. Operation [m].3~[m].0 ↔ [m].7~[m].4 Affected flag(s) None...
Page 162 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver TABRD [m] Read table (specific page) to TBLH and Data Memory Description The low byte of the program code (specific page) addressed by the table pointer pair (TBHP and TBLP) is moved to the specified Data Memory and the high byte moved to TBLH. Operation [m] ← program code (low byte) TBLH ← program code (high byte) Affected flag(s) None TABRDC [m] Read table (current page) to TBLH and Data Memory Description The low byte of the program code (current page) addressed by the table pointer (TBLP) is moved to the specified Data Memory and the high byte moved to TBLH. Operation [m] ← program code (low byte) TBLH ← program code (high byte) Affected flag(s) None TABRDL [m] Read table (last page) to TBLH and Data Memory Description The low byte of the program code (last page) addressed by the table pointer (TBLP) is moved to the specified Data Memory and the high byte moved to TBLH. Operation [m] ← program code (low byte) TBLH ← program code (high byte)
Page 163: Package Information
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver Package Information Note that the package information provided here is for consultation purposes only. As this information may be updated at regular intervals users are reminded to consult the Holtek website for the latest version of the package information. Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be transferred to the relevant website page. • Further Package Information (include Outline Dimensions, Product Tape and Reel Specifications) • Packing Meterials Information • Carton information Rev. 1.20 16� �an�a�� 2�� 201�...
Page 164: 20-Pin Sop (�00Mil) O�Tline Dimensions
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver 20-pin SOP (300mil) Outline Dimensions Dimensions in inch Symbol Min. Nom. Max. — 0.406 BSC — — 0.406 BSC — 0.012 — 0.020 0.�04 BSC — C’ — — — 0.104 —...
Page 165 BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver 24-pin SOP(300mil) Outline Dimensions " Dimensions in inch Symbol Min. Nom. Max. — 0.406 BSC — — 0.29� BSC — 0.012 — 0.020 C’ — 0.606 BSC — — — 0.104 —...
Page 166: 28-Pin Sop (�00Mil) O�Tline Dimensions
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver 28-pin SOP (300mil) Outline Dimensions & " Dimensions in inch Symbol Min. Nom. Max. — 0.406 BSC — — 0.29� BSC — 0.012 — 0.020 C’ — 0.70� BSC —...
Page 167: 28-Pin Ssop (1�0Mil) O�Tline Dimensions
BS82B12A-3/BS82C16A-3/BS82D20A-3 Touch Key 8-Bit Flash MCU with LED/LCD Driver 28-pin SSOP (150mil) Outline Dimensions & " Dimensions in inch Symbol Min. Nom. Max. — 0.2�6 BSC — — 0.1�4 BSC — 0.008 — 0.012 C’ — 0.�90 BSC —...
Page 168 However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise.

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Bs82c16a-3 Bs82d20a-3

Holtek BS82B12A-3 Manual

Features

General Description

Selection Table

Block Diagram

Pin Assignment

Pin Descriptions

Absolute Maximum Ratings

D.C. Characteristics

Characteristics

Sensor Oscillator Electrical Characteristics

Power-On Reset Characteristics

System Architecture

Flash Program Memory

RAM Data Memory

Special Function Register Description

EEPROM Data Memory

Oscillator

Operating Modes and System Clocks

Watchdog Timer

Reset and Initialisation

Input/Output Ports

Timer Modules - TM

Compact Type TM - CTM0

Periodic Type TM - PTM0

Touch Key Function

I 2 C Interface

UART Interface

Interrupts

SCOM and SSEG Function for LCD

Low Voltage Detector - LVD

Configuration Options

Application Circuit

Instruction Set

Instruction Set Summary

Instruction Definition

Package Information

Quick Links

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Summary of Contents for Holtek BS82B12A-3

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