Holtek BS86DH12C Manual page 57

BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO
• RSTC Register
Bit 7
Name RSTC7
R/W R/W
POR 0
Bit 7~0 RSTC7~RSTC0: Reset function control
01010101: No operation
10101010: No operation
Other values: Reset MCU
If these bits are changed due to adverse environmental conditions, the microcontroller
will be reset. The reset operation will be activated after a delay time, t
RSTF bit in the RSTFC register will be set to 1.
• RSTFC Register
Bit 7
Name —
R/W —
POR —
Bit 7~4 Unimplemented, read as "0"
Bit 3 RSTF: RSTC register software reset flag
0: Not occurred
1: Occurred
This bit is set to 1 by the RSTC control register software reset and cleared to zero
by the application program. Note that this bit can only be cleared to zero by the
application program.
Bit 2 LVRF: LVR function reset flag
Described elsewhere
LRF: LVRC register software reset flag
Bit 1
Described elsewhere
WRF: WDTC register software reset flag
Bit 0
Described elsewhere
Low Voltage Reset – LVR
The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of
the device. The LVR function is always enabled in the FAST and SLOW modes with a specific LVR
voltage, V . If the supply voltage of the device drops to within a range of 0.9V~V
LVR
occur when changing the battery, the LVR will automatically reset the device internally and the
LVRF bit in the RSTFC register will also be set to 1. For a valid LVR signal, a low supply voltage,
i.e., a voltage in the range between 0.9V~V
t in the LVD/LVR Electrical Characteristics. If the low supply voltage state does not exceed this
LVR
value, the LVR will ignore the low supply voltage and will not perform a reset function. The actual
V value can be selected by the LVS bits in the LVRC register. If the LVS7~LVS0 bits have any
LVR
other value, which may perhaps occur due to adverse environmental conditions such as noise, the
LVR will reset the device after a delay time, t
register will be set to 1. Note that the LVR function will be automatically disabled when the device
enters the SLEEP/IDLE mode.
Rev. 1.00
6 5 4
RSTC6 RSTC5 RSTC4
R/W R/W R/W
1 0 1
6 5 4
— — —
— — —
— — —
must exist for a time greater than that specified by
LVR
. When this happens, the LRF bit in the RSTFC
SRESET
57
3 2 1
RSTC3 RSTC2 RSTC1
R/W R/W R/W
0 1 0
SRESET
3 2 1
RSTF LVRF LRF
R/W R/W R/W
0 x 0
"x": unknown
such as might
LVR
October 26, 2018
0
RSTC0
R/W
1
, and the
0
WRF
R/W
0