Operating Modes And System Clocks; System Clocks - Holtek BS86DH12C Manual

BS86DH12C
High Voltage Touch A/D Flash MCU with HVIO

Operating Modes and System Clocks

Present day applications require that their microcontrollers have high performance but often still
demand that they consume as little power as possible, conflicting requirements that are especially
true in battery powered portable applications. The fast clocks required for high performance will
by their nature increase current consumption and of course vice versa, lower speed clocks reduce
current consumption. As Holtek has provided the device with both high and low speed clock sources
and the means to switch between them dynamically, the user can optimise the operation of their
microcontroller to achieve the best performance/power ratio.

System Clocks

The device has many different clock sources for both the CPU and peripheral function operation. By
providing the user with a wide range of clock options using register programming, a clock system
can be configured to obtain maximum application performance.
The main system clock can come from a high frequency f
selected using the CKS2~CKS0 bits in the SCC register. The high speed system clock is sourced
from the HIRC oscillator. The low speed system clock source can be sourced from the internal clock
f . If f is selected then it can be sourced by either the LXT or LIRC oscillator, selected via
SUB SUB
configuring the FSS bit in the SCC register. The other choice, which is a divided version of the high
speed system oscillator has a range of f
High Speed
Oscillator
HIRCEN HIRC
Low Speed
Oscillators
LXT
LIRC
Note: When the system clock source f
conserve the power or continue to oscillate to provide the clock source, f
use, which is determined by configuring the corresponding high speed oscillator enable control bit.
Rev. 1.00
/2~f /64.
H H
f
H
SLEEP
IDLE2
SLEEP
FSS
f
LIRC
WDT
Device Clock Configurations
is switched to f from f
SYS SUB
45
or low frequency f
H SUB
f /2
H
f /4
H
f /8
H
Prescaler
f /16
H
f /32
H
f /64
H
f
SUB
CKS2~CKS0
f
SUB
f
f /4
PSC
SYS
Prescaler
f
SYS
CLKSEL[1:0]
, the high speed oscillator can be stopped to
H
~ f /64, for peripheral circuits to
H H
source, and is
f
SYS
f
SUB
Time Base
October 26, 2018