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GPIB
Characteristics
Installation Instructions 2-2
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Servant
•
VXIbus Master (A16, A24, D16, D08(EO))
•
VXIbus Slave (A16, A24, A32, D16, D08(EO))
•
Up to 4 Megabytes of dual-ported (shared) memory
•
Three programmable VXIbus interrupt handlers
•
IEEE 488.1 and IEEE 488.2 compatible multiple primary or
multiple secondary
•
488-VXIbus translator
The 1260-00C has the following GPIB characteristics:
Communication With VXIbus Message-Based Devices
•
VXI logical addresses are mapped to GPIB addresses
•
Automatically configured at start-up
•
Programmable
Interface
•
NAT4882 and Turbo488 ASICs coupled with DMA
•
Full, transparent support of individual status bytes for each
GPIB address
•
Buffered operation decouples GPIB and VXIbus operation
•
Controller can address one VXIbus device to talk, and one or
more other VXIbus devices to listen
IEEE 488.1 Capabilities
•
SH1 (Source Handshake)
•
AH1 (Acceptor Handshake)
•
T5, TE5 (Talker, Extended Talker): multiple primary or
multiple secondary addressing
•
L3, LE3 (Listener, Extended Listener): multiple primary or
multiple secondary addressing
1260-00C User Manual
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