Xilinx VC707 User Manual page 84

Appendix C: Master UCF Listing
NET FMC2_HPC_HA03_N
NET FMC2_HPC_HA04_P
NET FMC2_HPC_HA04_N
#NET 5N826
#NET 5N830
NET FMC2_HPC_LA10_P
NET FMC2_HPC_LA10_N
NET FMC2_HPC_LA13_P
NET FMC2_HPC_LA13_N
NET FMC2_HPC_LA12_P
NET FMC2_HPC_LA12_N
NET FMC2_HPC_LA11_P
NET FMC2_HPC_LA11_N
NET FMC2_HPC_LA14_P
NET FMC2_HPC_LA14_N
#NET 5N961
#NET 5N962
NET FMC2_HPC_LA15_P
NET FMC2_HPC_LA15_N
NET FMC2_HPC_LA08_P
NET FMC2_HPC_LA08_N
NET FMC2_HPC_LA06_P
NET FMC2_HPC_LA06_N
NET FMC2_HPC_LA07_P
NET FMC2_HPC_LA07_N
#NET 5N964
#NET 5N963
NET FMC2_HPC_LA00_CC_P
NET FMC2_HPC_LA00_CC_N
NET FMC2_HPC_CLK0_M2C_P
NET FMC2_HPC_CLK0_M2C_N
NET FMC2_HPC_LA01_CC_P
NET FMC2_HPC_LA01_CC_N
#NET 5N959
#NET 5N960
NET FMC2_HPC_LA05_P
NET FMC2_HPC_LA05_N
#NET 5N957
#NET 5N958
NET FMC2_HPC_LA09_P
NET FMC2_HPC_LA09_N
#NET 5N953
#NET 5N954
#NET 5N955
#NET 5N956
NET FMC2_HPC_LA04_P
NET FMC2_HPC_LA04_N
NET FMC2_HPC_LA16_P
NET FMC2_HPC_LA16_N
NET FMC2_HPC_LA02_P
NET FMC2_HPC_LA02_N
NET FMC2_HPC_LA03_P
NET FMC2_HPC_LA03_N
#NET 5N829
#NET 6N1095
#NET 6N1094
#NET 6N1093
NET FMC2_HPC_LA26_P
NET FMC2_HPC_LA26_N
NET FMC2_HPC_LA25_P
NET FMC2_HPC_LA25_N
NET FMC2_HPC_LA21_P
NET FMC2_HPC_LA21_N
NET FMC2_HPC_LA30_P
NET FMC2_HPC_LA30_N
NET FMC2_HPC_LA27_P
NET FMC2_HPC_LA27_N
NET FMC2_HPC_LA33_P
NET FMC2_HPC_LA33_N
NET FMC2_HPC_LA32_P
NET FMC2_HPC_LA32_N
NET FMC2_HPC_LA24_P
NET FMC2_HPC_LA24_N
NET FMC2_HPC_LA23_P
NET FMC2_HPC_LA23_N
NET FMC2_HPC_LA17_CC_P
NET FMC2_HPC_LA17_CC_N
NET FMC2_HPC_CLK1_M2C_P
NET FMC2_HPC_CLK1_M2C_N
NET FMC2_HPC_LA18_CC_P
NET FMC2_HPC_LA18_CC_N
84
LOC = AA30 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB29 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC29 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB34 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB42 | IOSTANDARD=LVCMOS18; # Bank
LOC = W40 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y40 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA39 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AH39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AH38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AH40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AH41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG37 | IOSTANDARD=LVCMOS18; # Bank
LOC = N35 | IOSTANDARD=LVCMOS18; # Bank
LOC = T34 | IOSTANDARD=LVCMOS18; # Bank
LOC = R35 | IOSTANDARD=LVCMOS18; # Bank
LOC = N33 | IOSTANDARD=LVCMOS18; # Bank
LOC = N34 | IOSTANDARD=LVCMOS18; # Bank
LOC = R33 | IOSTANDARD=LVCMOS18; # Bank
LOC = R34 | IOSTANDARD=LVCMOS18; # Bank
LOC = P35 | IOSTANDARD=LVCMOS18; # Bank
LOC = P36 | IOSTANDARD=LVCMOS18; # Bank
LOC = T32 | IOSTANDARD=LVCMOS18; # Bank
LOC = R32 | IOSTANDARD=LVCMOS18; # Bank
LOC = P32 | IOSTANDARD=LVCMOS18; # Bank
LOC = P33 | IOSTANDARD=LVCMOS18; # Bank
LOC = T36 | IOSTANDARD=LVCMOS18; # Bank
LOC = R37 | IOSTANDARD=LVCMOS18; # Bank
LOC = P37 | IOSTANDARD=LVCMOS18; # Bank
LOC = P38 | IOSTANDARD=LVCMOS18; # Bank
LOC = U34 | IOSTANDARD=LVCMOS18; # Bank
LOC = T35 | IOSTANDARD=LVCMOS18; # Bank
LOC = R38 | IOSTANDARD=LVCMOS18; # Bank
LOC = R39 | IOSTANDARD=LVCMOS18; # Bank
LOC = U37 | IOSTANDARD=LVCMOS18; # Bank
LOC = U38 | IOSTANDARD=LVCMOS18; # Bank
LOC = U39 | IOSTANDARD=LVCMOS18; # Bank
LOC = T39 | IOSTANDARD=LVCMOS18; # Bank
LOC = U36 | IOSTANDARD=LVCMOS18; # Bank
LOC = T37 | IOSTANDARD=LVCMOS18; # Bank
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16 VCCO - VADJ_FPGA - IO_L23N_T3_16
16 VCCO - VADJ_FPGA - IO_L24P_T3_16
16 VCCO - VADJ_FPGA - IO_L24N_T3_16
16 VCCO - VADJ_FPGA - IO_25_VRP_16
17 VCCO - VADJ_FPGA - IO_0_VRN_17
17 VCCO - VADJ_FPGA - IO_L1P_T0_17
17 VCCO - VADJ_FPGA - IO_L1N_T0_17
17 VCCO - VADJ_FPGA - IO_L2P_T0_17
17 VCCO - VADJ_FPGA - IO_L2N_T0_17
17 VCCO - VADJ_FPGA - IO_L3P_T0_DQS_17
17 VCCO - VADJ_FPGA - IO_L3N_T0_DQS_17
17 VCCO - VADJ_FPGA - IO_L4P_T0_17
17 VCCO - VADJ_FPGA - IO_L4N_T0_17
17 VCCO - VADJ_FPGA - IO_L5P_T0_17
17 VCCO - VADJ_FPGA - IO_L5N_T0_17
17 VCCO - VADJ_FPGA - IO_L6P_T0_17
17 VCCO - VADJ_FPGA - IO_L6N_T0_VREF_17
17 VCCO - VADJ_FPGA - IO_L7P_T1_17
17 VCCO - VADJ_FPGA - IO_L7N_T1_17
17 VCCO - VADJ_FPGA - IO_L8P_T1_17
17 VCCO - VADJ_FPGA - IO_L8N_T1_17
17 VCCO - VADJ_FPGA - IO_L9P_T1_DQS_17
17 VCCO - VADJ_FPGA - IO_L9N_T1_DQS_17
17 VCCO - VADJ_FPGA - IO_L10P_T1_17
17 VCCO - VADJ_FPGA - IO_L10N_T1_17
17 VCCO - VADJ_FPGA - IO_L11P_T1_SRCC_17
17 VCCO - VADJ_FPGA - IO_L11N_T1_SRCC_17
17 VCCO - VADJ_FPGA - IO_L12P_T1_MRCC_17
17 VCCO - VADJ_FPGA - IO_L12N_T1_MRCC_17
17 VCCO - VADJ_FPGA - IO_L13P_T2_MRCC_17
17 VCCO - VADJ_FPGA - IO_L13N_T2_MRCC_17
17 VCCO - VADJ_FPGA - IO_L14P_T2_SRCC_17
17 VCCO - VADJ_FPGA - IO_L14N_T2_SRCC_17
17 VCCO - VADJ_FPGA - IO_L15P_T2_DQS_17
17 VCCO - VADJ_FPGA - IO_L15N_T2_DQS_17
17 VCCO - VADJ_FPGA - IO_L16P_T2_17
17 VCCO - VADJ_FPGA - IO_L16N_T2_17
17 VCCO - VADJ_FPGA - IO_L17P_T2_17
17 VCCO - VADJ_FPGA - IO_L17N_T2_17
17 VCCO - VADJ_FPGA - IO_L18P_T2_17
17 VCCO - VADJ_FPGA - IO_L18N_T2_17
17 VCCO - VADJ_FPGA - IO_L19P_T3_17
17 VCCO - VADJ_FPGA - IO_L19N_T3_VREF_17
17 VCCO - VADJ_FPGA - IO_L20P_T3_17
17 VCCO - VADJ_FPGA - IO_L20N_T3_17
17 VCCO - VADJ_FPGA - IO_L21P_T3_DQS_17
17 VCCO - VADJ_FPGA - IO_L21N_T3_DQS_17
17 VCCO - VADJ_FPGA - IO_L22P_T3_17
17 VCCO - VADJ_FPGA - IO_L22N_T3_17
17 VCCO - VADJ_FPGA - IO_L23P_T3_17
17 VCCO - VADJ_FPGA - IO_L23N_T3_17
17 VCCO - VADJ_FPGA - IO_L24P_T3_17
17 VCCO - VADJ_FPGA - IO_L24N_T3_17
17 VCCO - VADJ_FPGA - IO_25_VRP_17
18 VCCO - VADJ_FPGA - IO_0_VRN_18
18 VCCO - VADJ_FPGA - IO_L1P_T0_18
18 VCCO - VADJ_FPGA - IO_L1N_T0_18
18 VCCO - VADJ_FPGA - IO_L2P_T0_18
18 VCCO - VADJ_FPGA - IO_L2N_T0_18
18 VCCO - VADJ_FPGA - IO_L3P_T0_DQS_18
18 VCCO - VADJ_FPGA - IO_L3N_T0_DQS_18
18 VCCO - VADJ_FPGA - IO_L4P_T0_18
18 VCCO - VADJ_FPGA - IO_L4N_T0_18
18 VCCO - VADJ_FPGA - IO_L5P_T0_18
18 VCCO - VADJ_FPGA - IO_L5N_T0_18
18 VCCO - VADJ_FPGA - IO_L6P_T0_18
18 VCCO - VADJ_FPGA - IO_L6N_T0_VREF_18
18 VCCO - VADJ_FPGA - IO_L7P_T1_18
18 VCCO - VADJ_FPGA - IO_L7N_T1_18
18 VCCO - VADJ_FPGA - IO_L8P_T1_18
18 VCCO - VADJ_FPGA - IO_L8N_T1_18
18 VCCO - VADJ_FPGA - IO_L9P_T1_DQS_18
18 VCCO - VADJ_FPGA - IO_L9N_T1_DQS_18
18 VCCO - VADJ_FPGA - IO_L10P_T1_18
18 VCCO - VADJ_FPGA - IO_L10N_T1_18
18 VCCO - VADJ_FPGA - IO_L11P_T1_SRCC_18
18 VCCO - VADJ_FPGA - IO_L11N_T1_SRCC_18
18 VCCO - VADJ_FPGA - IO_L12P_T1_MRCC_18
18 VCCO - VADJ_FPGA - IO_L12N_T1_MRCC_18
18 VCCO - VADJ_FPGA - IO_L13P_T2_MRCC_18
18 VCCO - VADJ_FPGA - IO_L13N_T2_MRCC_18
VC707 Evaluation Board
UG885 (v1.2) February 1, 2013