Xilinx VC707 User Manual page 83

NET GPIO_LED_5_LS
NET GPIO_LED_6_LS
#NET 4N920
NET LCD_E_LS
NET LCD_RW_LS
NET LCD_DB4_LS
NET GPIO_LED_7_LS
NET GPIO_SW_C
NET GPIO_SW_E
NET PMBUS_ALERT_LS
NET CPU_RESET
NET GPIO_SW_W
NET PMBUS_DATA_LS
#NET 4N923
NET PMBUS_CLK_LS
NET FLASH_ADV_B
NET SM_FAN_PWM
NET SM_FAN_TACH
#NET 4N917
#NET 4N916
NET SFP_LOS_LS
NET FLASH_A23
NET FLASH_A22
NET FLASH_A21
NET FLASH_A20
NET FLASH_A19
NET IIC_MUX_RESET_B_LS
NET FLASH_A18
NET FLASH_A17
NET FLASH_A16
NET FLASH_OE_B
NET FLASH_FWE_B
NET FLASH_A25
NET FLASH_A24
#NET VRP_15
#NET 5N825
NET FMC2_HPC_HA14_P
NET FMC2_HPC_HA14_N
NET FMC2_HPC_HA15_P
NET FMC2_HPC_HA15_N
NET FMC2_HPC_HA12_P
NET FMC2_HPC_HA12_N
NET FMC2_HPC_HA20_P
NET FMC2_HPC_HA20_N
NET FMC2_HPC_HA19_P
NET FMC2_HPC_HA19_N
NET FMC2_HPC_HA16_P
NET FMC2_HPC_HA16_N
NET FMC2_HPC_HA23_P
NET FMC2_HPC_HA23_N
NET FMC2_HPC_HA22_P
NET FMC2_HPC_HA22_N
NET FMC2_HPC_HA18_P
NET FMC2_HPC_HA18_N
NET FMC2_HPC_HA21_P
NET FMC2_HPC_HA21_N
NET FMC2_HPC_HA06_P
NET FMC2_HPC_HA06_N
NET FMC2_HPC_HA00_CC_P
NET FMC2_HPC_HA00_CC_N
NET FMC2_HPC_HA01_CC_P
NET FMC2_HPC_HA01_CC_N
NET FMC2_HPC_HA17_CC_P
NET FMC2_HPC_HA17_CC_N
NET FMC2_HPC_HA13_P
NET FMC2_HPC_HA13_N
NET FMC2_HPC_HA10_P
NET FMC2_HPC_HA10_N
NET FMC2_HPC_HA11_P
NET FMC2_HPC_HA11_N
NET FMC2_HPC_HA09_P
NET FMC2_HPC_HA09_N
NET FMC2_HPC_HA05_P
NET FMC2_HPC_HA05_N
NET FMC2_HPC_HA07_P
NET FMC2_HPC_HA07_N
NET FMC2_HPC_HA08_P
NET FMC2_HPC_HA08_N
NET FMC2_HPC_HA02_P
NET FMC2_HPC_HA02_N
NET FMC2_HPC_HA03_P
VC707 Evaluation Board
UG885 (v1.2) February 1, 2013
LOC = AP41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY39 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY37 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA37 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW38 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY38 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB38 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB39 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA39 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA40 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY42 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV41 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA41 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW41 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW42 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU37 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y34 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF35 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF36 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF34 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG34 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD36 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC35 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC36 | IOSTANDARD=LVCMOS18; # Bank
LOC = AG36 | IOSTANDARD=LVCMOS18; # Bank
LOC = AH36 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA37 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y35 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA36 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB36 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB37 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA34 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA35 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB31 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB32 | IOSTANDARD=LVCMOS18; # Bank
LOC = AB33 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC33 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD32 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD33 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC34 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD35 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE32 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE33 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF31 | IOSTANDARD=LVCMOS18; # Bank
LOC = AF32 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE34 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE35 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE29 | IOSTANDARD=LVCMOS18; # Bank
LOC = AE30 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y32 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y33 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC31 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD31 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA31 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA32 | IOSTANDARD=LVCMOS18; # Bank
LOC = AC30 | IOSTANDARD=LVCMOS18; # Bank
LOC = AD30 | IOSTANDARD=LVCMOS18; # Bank
LOC = AA29 | IOSTANDARD=LVCMOS18; # Bank
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VC707 Board UCF Listing
15 VCCO - VCC1V8_FPGA - IO_L8P_T1_AD10P_15
15 VCCO - VCC1V8_FPGA - IO_L8N_T1_AD10N_15
15 VCCO - VCC1V8_FPGA - IO_L9P_T1_DQS_AD3P_15
15 VCCO - VCC1V8_FPGA - IO_L9N_T1_DQS_AD3N_15
15 VCCO - VCC1V8_FPGA - IO_L10P_T1_AD11P_15
15 VCCO - VCC1V8_FPGA - IO_L10N_T1_AD11N_15
15 VCCO - VCC1V8_FPGA - IO_L11P_T1_SRCC_15
15 VCCO - VCC1V8_FPGA - IO_L11N_T1_SRCC_15
15 VCCO - VCC1V8_FPGA - IO_L12P_T1_MRCC_15
15 VCCO - VCC1V8_FPGA - IO_L12N_T1_MRCC_15
15 VCCO - VCC1V8_FPGA - IO_L13P_T2_MRCC_15
15 VCCO - VCC1V8_FPGA - IO_L13N_T2_MRCC_15
15 VCCO - VCC1V8_FPGA - IO_L14P_T2_SRCC_15
15 VCCO - VCC1V8_FPGA - IO_L14N_T2_SRCC_15
15 VCCO - VCC1V8_FPGA - IO_L15P_T2_DQS_15
15 VCCO - VCC1V8_FPGA - IO_L15N_T2_DQS_ADV_B_15
15 VCCO - VCC1V8_FPGA - IO_L16P_T2_A28_15
15 VCCO - VCC1V8_FPGA - IO_L16N_T2_A27_15
15 VCCO - VCC1V8_FPGA - IO_L17P_T2_A26_15
15 VCCO - VCC1V8_FPGA - IO_L17N_T2_A25_15
15 VCCO - VCC1V8_FPGA - IO_L18P_T2_A24_15
15 VCCO - VCC1V8_FPGA - IO_L18N_T2_A23_15
15 VCCO - VCC1V8_FPGA - IO_L19P_T3_A22_15
15 VCCO - VCC1V8_FPGA - IO_L19N_T3_A21_VREF_15
15 VCCO - VCC1V8_FPGA - IO_L20P_T3_A20_15
15 VCCO - VCC1V8_FPGA - IO_L20N_T3_A19_15
15 VCCO - VCC1V8_FPGA - IO_L21P_T3_DQS_15
15 VCCO - VCC1V8_FPGA - IO_L21N_T3_DQS_A18_15
15 VCCO - VCC1V8_FPGA - IO_L22P_T3_A17_15
15 VCCO - VCC1V8_FPGA - IO_L22N_T3_A16_15
15 VCCO - VCC1V8_FPGA - IO_L23P_T3_FOE_B_15
15 VCCO - VCC1V8_FPGA - IO_L23N_T3_FWE_B_15
15 VCCO - VCC1V8_FPGA - IO_L24P_T3_RS1_15
15 VCCO - VCC1V8_FPGA - IO_L24N_T3_RS0_15
15 VCCO - VCC1V8_FPGA - IO_25_VRP_15
16 VCCO - VADJ_FPGA - IO_0_VRN_16
16 VCCO - VADJ_FPGA - IO_L1P_T0_16
16 VCCO - VADJ_FPGA - IO_L1N_T0_16
16 VCCO - VADJ_FPGA - IO_L2P_T0_16
16 VCCO - VADJ_FPGA - IO_L2N_T0_16
16 VCCO - VADJ_FPGA - IO_L3P_T0_DQS_16
16 VCCO - VADJ_FPGA - IO_L3N_T0_DQS_16
16 VCCO - VADJ_FPGA - IO_L4P_T0_16
16 VCCO - VADJ_FPGA - IO_L4N_T0_16
16 VCCO - VADJ_FPGA - IO_L5P_T0_16
16 VCCO - VADJ_FPGA - IO_L5N_T0_16
16 VCCO - VADJ_FPGA - IO_L6P_T0_16
16 VCCO - VADJ_FPGA - IO_L6N_T0_VREF_16
16 VCCO - VADJ_FPGA - IO_L7P_T1_16
16 VCCO - VADJ_FPGA - IO_L7N_T1_16
16 VCCO - VADJ_FPGA - IO_L8P_T1_16
16 VCCO - VADJ_FPGA - IO_L8N_T1_16
16 VCCO - VADJ_FPGA - IO_L9P_T1_DQS_16
16 VCCO - VADJ_FPGA - IO_L9N_T1_DQS_16
16 VCCO - VADJ_FPGA - IO_L10P_T1_16
16 VCCO - VADJ_FPGA - IO_L10N_T1_16
16 VCCO - VADJ_FPGA - IO_L11P_T1_SRCC_16
16 VCCO - VADJ_FPGA - IO_L11N_T1_SRCC_16
16 VCCO - VADJ_FPGA - IO_L12P_T1_MRCC_16
16 VCCO - VADJ_FPGA - IO_L12N_T1_MRCC_16
16 VCCO - VADJ_FPGA - IO_L13P_T2_MRCC_16
16 VCCO - VADJ_FPGA - IO_L13N_T2_MRCC_16
16 VCCO - VADJ_FPGA - IO_L14P_T2_SRCC_16
16 VCCO - VADJ_FPGA - IO_L14N_T2_SRCC_16
16 VCCO - VADJ_FPGA - IO_L15P_T2_DQS_16
16 VCCO - VADJ_FPGA - IO_L15N_T2_DQS_16
16 VCCO - VADJ_FPGA - IO_L16P_T2_16
16 VCCO - VADJ_FPGA - IO_L16N_T2_16
16 VCCO - VADJ_FPGA - IO_L17P_T2_16
16 VCCO - VADJ_FPGA - IO_L17N_T2_16
16 VCCO - VADJ_FPGA - IO_L18P_T2_16
16 VCCO - VADJ_FPGA - IO_L18N_T2_16
16 VCCO - VADJ_FPGA - IO_L19P_T3_16
16 VCCO - VADJ_FPGA - IO_L19N_T3_VREF_16
16 VCCO - VADJ_FPGA - IO_L20P_T3_16
16 VCCO - VADJ_FPGA - IO_L20N_T3_16
16 VCCO - VADJ_FPGA - IO_L21P_T3_DQS_16
16 VCCO - VADJ_FPGA - IO_L21N_T3_DQS_16
16 VCCO - VADJ_FPGA - IO_L22P_T3_16
16 VCCO - VADJ_FPGA - IO_L22N_T3_16
16 VCCO - VADJ_FPGA - IO_L23P_T3_16
83