Xilinx VC707 User Manual page 50

Chapter 1: VC707 Evaluation Board Features
User SMA
Figure 1-28
X-Ref Target - Figure 1-28
Table 1-26
Table 1-26: GPIO Connections to FPGA U1
FPGA (U1) Pin
50
shows the user SMA circuit.
J33
SMA
Connector
J34
SMA
Connector
lists the GPIO Connections to FPGA U1.
Schematic Net Name
Indicator LEDs (Active-High)
AM39 GPIO_LED_0
AN39 GPIO_LED_1
AR37 GPIO_LED_2
AT37 GPIO_LED_3
AR35 GPIO_LED_4
AP41 GPIO_LED_5
AP42 GPIO_LED_6
AU39 GPIO_LED_7
CPU Reset Pushbutton Switch
AV40 CPU_RESET
Directional Pushbutton Switches
AR40 GPIO_SW_N
AU38 GPIO_SW_E
AP40 GPIO_SW_S
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GND
GND
Figure 1-28: User SMA
GPIO Pin
DS2.2
DS3.2
DS4.2
DS5.2
DS6.2
DS7.2
DS8.2
DS9.2
SW3.3
SW3.3
SW4.3
SW5.3
USER SMA GPIO P
USER SMA GPIO N
UG885_c1_126_012413
VC707 Evaluation Board
UG885 (v1.2) February 1, 2013