Xilinx VC707 User Manual page 17

Table 1-5: BPI Flash Memory Connections to the FPGA (Cont'd)
Additional FPGA bitstreams can be stored and used for configuration by setting the Warm
Boot Start Address (WBSTAR) register contained in 7 series FPGAs. More information is
available in the reconfiguration and multiboot section in UG470, 7 Series FPGAs
Configuration User Guide.
The configuration section of UG470, 7 Series FPGAs Configuration User Guide provides
details on the Master BPI configuration mode.
Figure 1-4
more details, see the Numonyx PC28F00AG18FE data sheet
VC707 Evaluation Board
UG885 (v1.2) February 1, 2013
FPGA (U1) Pin Net Name
AW41 FLASH_A25
NA NC
AM36 FLASH_D0
AN36 FLASH_D1
AJ36 FLASH_D2
AJ37 FLASH_D3
AK37 FLASH_D4
AL37 FLASH_D5
AN35 FLASH_D6
AP35 FLASH_D7
AM37 FLASH_D8
AG33 FLASH_D9
AH33 FLASH_D10
AK35 FLASH_D11
AL35 FLASH_D12
AJ31 FLASH_D13
AH34 FLASH_D14
AJ35 FLASH_D15
AM34 FLASH_WAIT
BB41 FPGA_FWE_B
BA41 FLASH_OE_B
N10 FPGA_CCLK
AL36 FLASH_CE_B
AY37 FLASH_ADV_B
AG11 FPGA_INIT_B
shows the connections of the linear BPI Flash memory on the VC707 board. For
www.xilinx.com
BPI Flash Memory (U3)
Pin Number Pin Name
B8 A26
H1 A27
F2 DQ0
E2 DQ1
G3 DQ2
E4 DQ3
E5 DQ4
G5 DQ5
G6 DQ6
H7 DQ7
E1 DQ8
E3 DQ9
F3 DQ10
F4 DQ11
F5 DQ12
H5 DQ13
G7 DQ14
E7 DQ15
F7 WAIT
G8 WE_B
F8 OE_B
E6 CLK
B4 CE_B
F6 ADV_B
D4 RST_B
[Ref
Feature Descriptions
1].
17