YOKOGAWA WT3000 User Manual page 163

7.2 Status Byte
Operation of the Status Byte
Reading from the Status Byte
Clearing the Status Byte
7-4
A service request is issued when bit 6 of the status byte becomes 1. Bit 6 is set to 1
when any of the other bits becomes a 1 (when the corresponding bit of the service
request enable register is also set to 1).For example, if an event occurs and any of the
bits of the logical AND of the standard event register and the corresponding enable
register becomes a 1, then bit 5 (ESB) is set to 1. In this case, if bit 5 of the service
request enable register is 1, bit 6 (MSS) is set to 1, thus requesting service from the
controller. It is also possible to check what type of event has occurred by reading the
contents of the status byte.
The following two methods are provided for reading the status byte.
Inquiry Using the *STB? Query
Making an inquiry using the *STB? query sets bit 6 to MSS. This causes the MSS to be
read. After completion of the read-out, none of the bits in the status byte will be cleared.
Serial Polling
Execution of a serial polling changes bit 6 to RQS. This causes RQS to be read. After
completion of the read-out, only RQS is cleared. It is not possible to read MSS using
serial polling.
No method is provided for forcibly clearing all the bits in the status byte. The bits that are
cleared for each operation are shown below.
When a Query Is Made Using the *STB? Command
No bits are cleared.
When a Serial Polling Is Executed
Only the RQS bit is cleared.
When a *CLS Command Is Received
When the *CLS command is received, the status byte itself is not cleared, but the
contents of the standard event register (which affects the bits in the status byte) are
cleared. As a result, the corresponding bits in the status byte are cleared, except bit 4
(MAV), since the output queue cannot be emptied by the *CLS command. However, the
output queue is also cleared if the *CLS command is received just after a program
message terminator.
IM 760301-17E