Tout Output Control - Epson Arm S1C31 Series Technical Manual

Capture data transfer using DMA
By setting the T16B_nCCmDMAEN.CCmDMAENx bit to 1 (DMA transfer request enabled) in capture
mode, a DMA transfer request is sent to the DMA controller and the T16B_nCCRm register value is trans-
ferred to the specified memory via DMA Ch.x when the T16B_nINTF.CMPCAPmIF bit is set to 1 (when
data has been captured).
This automates reading and saving of capture data.
The transfer source/destination and control data must be set for the DMA controller and the relevant DMA
channel must be enabled to start a DMA transfer in advance. For more information on DMA, refer to the
"DMA Controller" chapter.
Table 17.4.3.2 DMA Data Structure Configuration Example (Capture Data Transfer)
End pointer
Control data dst_inc

17.4.4 TOUT Output Control

Comparator mode can generate TOUT signals using the comparator MATCH and counter MAX/ZERO signals. The
generated signals can be output to outside the IC. Figure 17.4.4.1 shows the TOUT output circuits (circuits 0 and 1).
ZERO signal
MAX signal
Each timer channel includes two (four, or six) TOUT output circuits and their signal generation and output can be
controlled individually.
TOUT generation mode
The T16B_nCCCTLm.TOUTMD[2:0] bits are used to set how the TOUT signal waveform is changed by the
MATCH and MAX/ZERO signals.
Furthermore, when the T16B_nCCCTLm.TOUTMT bit is set to 1, the TOUT circuit uses the MATCH signal
output from another system in the circuit pair (0 and 1, 2 and 3, 4 and 5). This makes it possible to change the
signal twice within a counter cycle.
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
Item
Transfer source T16B_nCCRm register address
Transfer destination Memory address to which the last capture data is stored
0x1 (+2)
dst_size 0x1 (haflword)
src_inc 0x3 (no increment)
src_size 0x1 (halfword)
R_power 0x0 (arbitrated for every transfer)
n_minus_1 Number of transfer data
cycle_ctrl 0x1 (basic transfer)
Comparator/capture block Ch.n
T16B_nCCCTL0 register
TOUTINV
TOUTMD[2:0]
MATCH signal
Comparator 0
Comparator 1 MATCH signal
TOUTMD[2:0]
TOUTINV
T16B_nCCCTL1 register
Figure 17.4.4.1 TOUT Output Circuits (Circuits 0 and 1)
Seiko Epson Corporation
Setting example
TOUTMT
TOUTO
TOUT
output control
0
TOUT
output control
1
TOUTMT
TOUTO
17 16-BIT PWM TIMERS (T16B)
TOUTn0
TOUTn1
17-17