Output Signals; Pixel Clock; Line Valid Bit; Data Valid Bit - Basler L100k User Manual

2.5 Output Signals

The camera's output signals include a pixel clock, video data, and video data qualifiers such as
line valid and data valid. Sections 2.5.1 through 2.5.4 describe the output signals.

2.5.1 Pixel Clock

As shown in Figure 2-3 and in Table 2-3, the pixel clock is assigned to the TxClkIn (transmit clock)
pin of the Camera Link transmitter. The pixel clock is used to time the sampling and transmission
of pixel data as shown in Figures 2-4 through 2-10. The Camera Link transmitter used in L100
cameras requires pixel data to be sampled and transmitted on the falling edge of the clock.
The frequency of the pixel clock varies depending on the camera model and on the output mode
of the camera. The available output modes are explained in detail in Sections through .
Note that the timing used for sampling the data at the Camera Link receiver in the
frame grabber varies from device to device. On some receivers, data must be sam-
pled on the rising edge of the pixel clock (receive clock), and on others, it must be
sampled on the falling edge. Also, some devices are available which allow you to
select either rising edge or falling edge sampling. Please consult the data sheet for
the receiver that you are using for specific timing information.

2.5.2 Line Valid Bit

As shown in Figures 2-4 through 2-10, the line valid bit indicates that a valid line is being
transmitted. Pixel data is only valid when this bit is high.

2.5.3 Data Valid Bit

The data valid bit is only used with the L101
Bit output mode.
In dual output mode, valid pixel data is only transmitted on every other cycle of the pixel clock. On
the L101 , the data valid bit is used to identify the cycles where valid pixel data is transmitted (see
k
Section 2.5.5). Pixel data is only valid when the line valid bit and the data valid bit are both high.
BASLER L100
k Series
DRAFT
when the L101
k k
Camera Interface
is operating in Dual 10 Bit or Dual 8
k
2-7