Paradyne 9126 User Manual page 206

Paradyne router user's guide
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7. Operation and Maintenance
Table 7-8.
7-24
Health and Status Messages (5 of 7)
Message
OOF at ISDN PRI (Active/Idle)
(ISDN PRI DBM only)
OOF at Network 1
Path IP_ Address Down,
1
DLCI nnnn
PLB Active, [Interface]
Power Supply/Fan Alarm
(9000 Series Access Carrier only)
Primary Clock Failed
Primary & Secondary Clocks
Failed
PVC Loopback Active, DLCI
1,2
nnnn , frame_relay_link
1
nnnn indicates a DLCI number of 16 through 1007.
2
frame relay link is one of the following:
– Net1-FR1. The frame relay link specified for the network interface, Network 1.
– Port- n . The frame relay link associated with the user data port.
– ISDN Link Name on a non-network ISDN DBM interface.
3
Does not apply to a TS Management Link DLCI.
September 2002
What It Indicates
An Out of Frame (OOF) condition is detected on the
ISDN PRI interface. An OOF is declared when two
out of four frame synchronization bits are in error.
T
Active – Backup call was in progress.
T
Idle – DBM was in Idle mode.
Possible reasons include:
T
Incompatible framing format between the ISDN
network and the FrameSaver unit.
T
ISDN network cabling problem.
T
ISDN network problem.
An Out of Frame (OOF) condition is detected on the
network interface. Possible reasons include:
T
Incompatible framing format between the network
and the FrameSaver unit.
T
Network cabling problem.
T
T1 facility problem.
A path on the network interface is unavailable.
IP_Address is the IP address of the path endpoint,
and nnnn is the DLCI which contains the path.
A Payload Loopback (PLB) is active on the specified
interface.
The power supply output voltage has dropped below
the specified tolerance level required for the system.
Or the fan tray is not operating properly.
A failure of the primary clock source configured for
the unit is detected and the secondary clock is
providing the timing for the unit.
This condition clears when the configured primary
clock is restored.
A failure of the primary and secondary clock sources
configured for the unit are detected and the internal
clock is providing timing for the unit.
The clock source will not automatically switch from
internal until the primary clock source returns.
A PVC Loopback is active on the specified DLCI on
the frame relay link.
9128-A2-GB20-80

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