Paradyne 9126 User Manual page 102

4. Configuration Options
Table 4-12. Signaling and Trunk Conditioning Values (3 of 3)
4-58
Network Side Meanings
PLAR3idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
a PLAR D3 interface (ABCD = 0000).
PLAR3busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an PLAR D3 interface (ABCD = 1111).
PLAR4idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
a PLAR D4 interface (ABCD = 1111).
PLAR4busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for an PLAR D4 interface (ABCD = 0000).
DPO-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
a DPO interface (ABCD = 0000).
DPO-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for a DPO interface (ABCD = 1111).
DPT-idle The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the idle state for
a DPT interface (ABCD = 0000).
DPT-busy The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent the busy state
for a DPT interface (ABCD = 1111).
USER- xxxx The signaling bits transmitted to the cross-connected
T1 interface during a CGA represent a user-defined
pattern of ABCD = xxxx .
* xxxx is the same value on both the Network and the DSX-1 sides.
September 2002
DSX-1 Side
PLAR3idle
PLAR3busy
PLAR4idle
PLAR4busy
DPT-idle
DPT-busy
DPO-idle
DPO-busy
USER- xxxx *
9128-A2-GB20-80