NXP Semiconductors MPC5644A Reference Manual page 1688

Nexus Port Controller (NPC)
37.5.3.2 Retrieving device IDCODE
The Nexus TAP controller does not implement the IDCODE instruction. However, the device
identification message can be output by the NPC through the auxiliary output port or shifted out serially
by accessing the Nexus Device ID register through the TAP. Transmission of the device identification
message on the auxiliary output port MDO pins occurs immediately after a write to the PCR, if the NPC
is enabled. Transmission of the device identification message serially via TDO is achieved by performing
a read of the register contents as described in
37.5.3.3 Loading NEXUS-ENABLE instruction
Access to the NPC registers is enabled when the TAP controller instruction register is loaded with the
NEXUS-ENABLE instruction. This instruction is shifted in via the SELECT-IR-SCAN path and loaded
in the UPDATE-IR state. At this point, the Nexus controller state machine, shown in
transitions to the REG_SELECT state. The Nexus controller has three states: idle, register select, and data
access. Table 37-11 illustrates the IEEE 1149.1 sequence to load the NEXUS-ENABLE instruction.
TEST-LOGIC-RESET=1
Clock TMS
0 0
1 1 SELECT-DR-SCAN
2 1
3 0
4 0
12 1
1688
Section 37.5.3.4, Selecting a Nexus client
REG_SELECT
NEXUS-ENABLE=1 &&
UPDATE-IR=1
DATA_ACCESS
Figure 37-10. NEXUS controller state machine
Table 37-11. Loading NEXUS-ENABLE instruction
IEEE 1149.1 state Nexus state
RUN-TEST/IDLE IDLE
IDLE
SELECT-IR-SCAN IDLE
CAPTURE-IR IDLE
SHIFT-IR IDLE
3 TCKS
EXIT1-IR IDLE
MPC5644A Microcontroller Reference Manual, Rev. 6
NEXUS-ENABLE=0
IDLE
NEXUS-ENABLE=1
UPDATE-DR=1
UPDATE-DR=1
Description
IEEE 1149.1-2001 TAP controller in idle state
Transitional state
Transitional state
Internal shifter loaded with current instruction
TDO becomes active, and the IEEE 1149.1-2001
shifter is ready. Shift in all but the last bit of the
NEXUS_ENABLE instruction.
Last bit of instruction shifted in
register.
Figure 37-10,
Freescale Semiconductor