NXP Semiconductors MPC5644A Reference Manual page 1728

Microcontroller
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Revision history
Table A-5. Changes between revisions 4 and 5 (continued)
Chapter
Chapter 11
Flash memory
Chapter 12
General-Purpose Static RAM
(SRAM)
Chapter 16
System Integration Unit (SIU)
Chapter 17
Frequency-modulated phase
locked loop (FMPLL)
Chapter 21
Boot Assist Module (BAM)
Chapter 22
Configurable Enhanced Modular
IO Subsystem (eMIOS200)
Chapter 23
Enhanced Time Processing Unit
(eTPU2)
Chapter 25
Enhanced Queued
Analog-to-Digital Converter
(EQADC)
Chapter 30
Deserial Serial Peripheral
Interface (DSPI)
1728
• Changed BIUCR reset and BIUAPR reset bits to 0x0000FF00 and
0x000000FF, respectively.
• Added section "UTest Mode".
• Previous errata err001433 (e6878253PDM) integrated into the reference
manual, Added the following in table "UMISRn field descriptions":
"After running the user-test-mode margin read..."
• Added a new row "0x00F0_0000 Reserved" in the table "Flash memory
map".
• Extracted a new
Table 79
existing
Table 78
"Flash memory".
• Replaced UMx with UMISRx, throughout.
Added text "VSTBY pad needs an external RC..."
Conditionalized a cross-reference as FSL-specific in "PARTNUM [0–15]"
description row of the table "SIU_MIDR field description".
Added a footnote to "VSSPLL" stating "This signal is internally bonded to VSS",
in table "Signal properties".
Updated Table 445. "Watchdog timeouts" to match the values in Table 12.
"Watchdog timeout periods".
Corrected the table "STAC client submodule server slot assignment".
Removed Register ETPUWDSR.
• In the figure: "On-Chip ADC Control Scheme" renamed block "Result Format"
to "Result Format and Calibration Sub-Block".
• Previous errata err002449 (e12982697PDM) integrated into the reference
manual: Added note "Both ADC0 and ADC1 of an eQADC module..."
• Previous errata err000652 (e6877374PDM) integrated into the reference
manual: Updated table "Non-multiplexed Channel Assignments"and the note
"50% x VREF = 50% ref = (VRH / VRL)/2, but..."
• Previous errata err001741 (e6860916PDM) integrated into the reference
manual: Added paragraph "For accurate calibration... Command Message
(LST = 0b10 or 0b11)" in section 25.7.6 "ADC Result Calibration".
• Removed figure from section 30.10.18.1 "Stop mode (External Stop mode)",
as per Monaco manual.
• DSE[1:0] bits added in Figure 727 "DSPI DSI Configuration Register 1
(DSPI_DSICR1)" (bits 14 and15) and Table 739 "DSPI_DSICR1 field
description"per Mamba manual.
• Errata err003105 (e6183ps) incorporated in the manual:
Added note in section 30.10.6.5 "Continuous selection format".
• Errata err003230 (e8845ps) incorporated in the manual:
Added the following bullet point in section 30.10.7 Continuous serial
communications clock
"The TX FIFO must be cleared before initiating any SPI configuration
transfer"
MPC5644A Microcontroller Reference Manual, Rev. 6
Changes
"Flash Shadow block mapping"from already
Freescale Semiconductor

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