NXP Semiconductors MPC5644A Reference Manual page 1724

Microcontroller
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Revision history
Table A-4. Changes between revisions 3 and 4 (continued)
Chapter
Chapter 16
System Integration Unit (SIU)
Chapter 17
Frequency-Modulated Phase
Locked Loop (FMPLL)
Chapter 19
System Timer Module (STM)
Chapter 20
Software Watchdog Timer (SWT)
1724
"Memory map and register descriptions" section: Changed signal name notation
for DSPI:
- PCSxn or DSPI_x_CS[n] is now DSPI_x_PCS[n]
- SOUTx is now DSPI_x_SOUT
- SINx is now DSPI_x_SIN
- SCKx is now DSPI_x_SCK
SIU address map: Added page index 'Location' column
Removed "Pin" column from PCR PA values tables (including table in Sample
PCR map)
Pad Configuration Register (SIU_PCR12): Replaced "DATA[0]" with "DATA[16]"
in footnotes
SIU_PCR113 PA values: Change name TCR_A to TCRCLKA
SIU_PCR138 to SIU_PCR143 PA values tables: Added footnote explaining that
the eTPU function controlled by these registers has an additional
dependency on the SIU_ISEL8 register settings
SIU_PCR143 PA values: Corrected PA value for ALT2—was 0b0100; is 0b100
Updated "Pad Configuration Register 219 (SIU_PCR219)" section
SIU_PCR228 PA values: Changed PA value for TDO—was '—'; is '01'
SIU_PCR232 PA values: Changed pin and associated content from "EMIOS[5]
output only" to "TDI"
Added details to SIU_PCR219 section. This PCR is unusual in that it controls
configuration for two pins: GPIO[219] and MCKO, but not all fields apply to
both pins.
SIU_SYSDIV field description: Added note to SYSCLKDIV field description to
explain that clock divider selection depends on BYPASS field value
Added
Section 16.7.24, "IMUX Select Register 10 (SIU_ISEL10 or
SIU_DECFIL1)
eQADC advance trigger selection: Changed input for values 00000 and 00111
to "Reserved"
REACMSTP field added to SIU_HLT register
REACMACK field added to SIY_HLTACK register
NSETIACK field added to SIU_HLTACK register
Flash removed from list of modules affected by SIU_HLT_CPUSTP]
Bypass mode with crystal reference mode can be entered after reset by
programming FMPLL_ESYNCR1[CLKCFG] (previously pointed to PLLCFG
field).
STM memory map:
• Added location page index column
• Changed name of STM_CNT (was STM Counter Value; is STM Count
Register)
• Removed 32-bit size and R/W access from 'Reserved' rows
• Deleted device-specific information section
• Updated reset value of SWT_MCR register
• Updated reset value of SWT_TO register
• Updated reset value of SWT_CO register
MPC5644A Microcontroller Reference Manual, Rev. 6
Changes
Freescale Semiconductor

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