NXP Semiconductors MPC5644A Reference Manual page 1703

Appendix A
Revision history
A.1 Revisions 1
Date
31-Oct-2008 Initial release
A.2 Changes between revisions 1 and 2
Chapter
Chapter 2
Memory Map
Chapter 3
Signal Description
Chapter 4 (Resets)
Chapter 5
Operating Modes and Clocking
Chapter 7
Enhanced Direct Memory Access
Controller (eDMA)
Freescale Semiconductor
Table A-1. Revision 1
Table A-2. Changes between revisions 1 and 2
Updated allocated size for the following address locations:
• 0x0100_0000 and 0x1FFF_FFFF
• 0x2000_0000 and 0x2FFF_FFFF
• 0x3000_0000 and 0x3FFF_FFFF
Added two more reserved spaces 0xC3FD_3800 in place of 0xC3FD_4400
FLASH shadow Row - FL_1 address range changed
Signal Properties table:
• Removed Signal column
• Added Function column containing description of all Pins
• Removed Default State After Reset
• Added PCR PA Field column
• Added Status column with Pre-reset and Post-reset state and function
Signal Details table:
• Signal descriptions updated.
• Resets detail added
• "Boot Configuration (BOOTCFG[0:1])" section added.
• Column of BOOTCFG values added to "Reset Vector Location" table
• PS0 bit added to RCHW structure.
• Added FlexCAN clock divider to list of clock dividers
• Added details to FlexCAN clock support
Completely rewritten
MPC5644A Microcontroller Reference Manual, Rev. 6
Changes
Changes
Revision history
1703