Dts Device Connections - NXP Semiconductors MPC5644A Reference Manual

Development Trigger Semaphore (DTS)
The DTS Trigger Output (DTO) signal is connected to one of the EVTO inputs of the Nexus Port
Controller (NPC). The other EVTO inputs to the NPC are connected to the other Nexus modules in the
device. DTO is asserted when any bit in the DTS_SEMAPHORE register is set.
When the DTS module is enabled (DTS_ENABLE[DTS_EN] = 0b1), the
Nexus EVTO function of the EVTO pin is disabled and EVTO becomes the
DTO. Unlike the EVTO function that only asserts for one clock, the DTO
function remains asserted until the tool reads the DTS_SEMAPHORE
register, clearing the register's contents.
Figure 38-2 shows the chain of events that begins with setting of any bit in the DTS_SEMAPHORE
register and the clearing of the register caused by a Nexus read.
DTS_SEMAPHORE register
DTS Trigger Output (DTO)
EVTO pin
Initial conditions:
– DTS_ENABLE[DTS_EN] = 0b1
– DTS_SEMAPHORE = 0x0000_0000
38.3

DTS device connections

The DTS module connects to the Peripheral Bridge (PBRIDGE) for access to the registers. The PBRIDGE
is connected to a slave port of the Crossbar bus interface (XBAR). Connected to the XBAR master ports
are the core (e200z4, with one master port for the Instruction and another for the Load/Store bus), the
eDMA module, the FlexRay module, and an External Bus interface
The registers have limited access as described in
the XBAR Master ID of the accessing module. Access to the DTS_SEMAPHORE register is limited to the
e200z4 core and the eDMA module and is restricted to only setting bits. Only an access via a Nexus
Read/Write Access from an external tool through the Nexus/JTAG port of the device can clear bits in the
1. The External Bus Interface XBAR master port is used for internal test of the device and is not accessible to the user.
1694
CPU writes
Internal DTO signal
DTS_SEMAPHORE
is asserted
to a non-zero value
Nexus RWA reads
DTS_SEMAPHORE,
which clears register
Figure 38-2. DTO event sequence
MPC5644A Microcontroller Reference Manual, Rev. 6
NOTE
EVTO asserted
externally
Internal DTO
signal is negated
1
.
Section 38.3.1, DTS register
EVTO negated
externally
access. Access is based on
Freescale Semiconductor