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A.4
*ESE? — STANDARD EVENT STATUS ENABLE QUERY
Syntax:
*ESE?
Description: Returns the mask stored in the Standard Event Status Enable Register. Contents of Standard
Event Status Enable register (*ESE) determine which bits of Standard Event Status register (*ESR)
are enabled, allowing them to be summarized in the Status Byte register (*STB). All of the enabled
events of the Standard Event Status Enable Register are logically ORed to cause ESB (bit 5) of the
Status Byte Register to be set (1 = set = enable function, 0 = reset = disable function). (See example,
Figure A-1.)
A.5
*ESR? — EVENT STATUS REGISTER QUERY
Syntax:
*ESR?
Return value: <integer> (Value = contents of Event Status register as defined in Table A-2.)
Description: Causes the power supply to return the contents of the Standard Event Status register. After it
has been read, the register is cleared. The Standard Event Status register bit configuration is
defined in Table A-2 (1 = set, 0 = reset). The error bits listed in Table A-2 are also related to error
codes produced during parsing of messages and to errors in the power supply (see PAR. B.130)
•
Any 1xx type error sets the Command error bit (5) see.
•
Any 2xx type error sets the Execution error bit (4).
•
Any 3xx type error sets the Device error bit (3). The Device error bit will be set when Current Error
or Voltage Error is detected and the corresponding Status Questionable bit is set (see PAR. B.28).
•
Any 4xx type error sets the Query error bit (2).
Related Commands: *CLS, *ESE, *OPC. (See example, Figure A-1.)
A.6
*IDN? — IDENTIFICATION QUERY
Syntax:
*IDN?
Return value: Character string
Description: Identifies the instrument. This query requests identification. The power supply returns a string
which contains the manufacturer name, the model, the serial number and the firmware level. The
character string contains the following fields: <Manufacturer>, <Model>, <Voltage>, <Current>,
<Serial Number>, <Main revision>-<Flash revision> where: <Manufacturer> = KEPCO, <Model> =
BOP 1000W, <Serial Number> = SSSSSS <date> = (string of up to 12 contiguous characters denoting
calibration date) <Main revision=n.m, (e.g, 1.0) > (See example, Figure A-1.)
A.7
*OPC — OPERATION COMPLETE COMMAND
Syntax:
*OPC
Description: Causes power supply to set status bit 0 (Operation Complete) to "0" indicating the unit is busy.
When pending operations are complete this status bit is set to "1." This command sets Standard
Event Status Register bit 0 (see Table A-2) to "0." Subsequent *OPC? commands return "0" until all
three microprocessors are idle, indicating that all previous commands have been executed and
changes in output level have been completed. When all microprocessors are idle, *OPC? return "1."
*OPC? must be proceeded by *OPC to first clear status bit 0, otherwise the *OPC? will return a "1"
that has no meaning. This command does not prevent processing of subsequent commands, but bit 0
will not be set until all pending operations are completed. (1 = set = enable function, 0 = reset = dis-
able function). (See example, Figure A-1.) As an example, the controller sends command(s), then
sends *OPC. If controller then sends *ESR?, the power supply responds with either a "0" (if the power
supply is busy executing the programmed commands), or a "1" (if the previously programmed com-
mands are complete). (See example, Figure A-1.)
A-2
Return value: Integer> value per Table A-2.
*ESE?
*ESR?
*IDN?
*OPC
BIT 4886 080709
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