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B.111 STATus:OPERation:ENABle COMMAND
Syntax:
Short Form:
Long Form:
Description: Sets Operation Enable Register. The Operation Enable Register is a mask for enabling specific bits
in the Operation Event Register which will cause the operation summary bit (bit 7) of the Status Byte
register to be set Bit set to 1 = function enabled (active, true); bit reset to 0 = function disabled (inac-
tive, false). The operation summary bit is the logical OR of all the enabled bits in the Operation Event
register. (See example, Figure B-10.)
B.112 STATus:OPERation:ENABle? QUERY
Syntax:
Short Form: STAT:OPER:ENAB?
Return Value: <int_value>
Description: Reads Operation Enable Register (see Table B-3). Returns value of Operation Enable Register bits.
Bit set to 1 = function enabled (active, true); bit reset to 0 = function disabled (inactive, false). (See
example, Figure B-10.)
B.113 STATus:OPERation[:EVENt] QUERY
Syntax:
Short Form: STAT:OPER[:EVEN]?
Return Value: <int_value>
Description: Indicates changes in conditions monitored by Operational Event Register (see Table B-3).
Returns the value of the Operation Event register. The Operation Event register is a read-only register
which holds (latches) all events that occur. Reading the Operation Event register clears it. (See exam-
ple, Figure B-10.)
B.114 STATus:PRESet COMMAND
Syntax:
Short Form: STAT:PRES
Description: Disables reporting of all status events. This command sets the Operation Enabled Register (Table
B-3) to 8193 and the Questionable Register to 255. (See example, Figure B-10.)
B.115 STATus:QUEStionable[:EVENt]? QUERY
Syntax:
Short Form: STAT:QUES[EVEN]?
Return Value: <int_value> actual register value
Description: Indicates the latched condition of the Questionable Event register. Returns the value of the
Questionable Event register (see Table B-4). The Questionable Event register is a read-only register
which holds (latches) all events. Only bits 13 and 12 are latched in the Status Questionable Event reg-
ister. Bits 0 and 1 of the Status Questionable Condition Register are not latched in the power supply.
Reading the Questionable Event register clears it. (See example, Figure B-10.)
TABLE B-4. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION
NU
SINK
BIT
15
14
VALUE
32,768
16,359
B.116 STATus:QUEStionable:CONDition? QUERY
Syntax:
Short Form: STAT:QUES:COND?
Return Value: <int_value> actual register value
Description: Returns the value of the Questionable Condition Register (see Table B-4). The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). Bits 1 or
0 may be both be set, indicating the power supply is settling after a voltage change. (See example,
Figure B-10.)
BOP-1K 080709
STAT:OPER:ENAB <int_value>
STATus:OPERation:ENABle <int_value>
CE
VE
NU
SE
13
12
11 - 7
6
8192 4096
2048 - 128
64
STAT:OPER:ENAB?
Long Form: STATus:OPERation:ENABle?
Long Form: STATus:OPERation[:EVENt]?
Long Form: STATus:PRESet
Long Form: STATus:QUEStionable[EVENT]?
CE
NU
TE NU CM VM
CM Current Mode Error
NU
5-4
3
2
1
0
SE
SINK Power Supply absorbing energy from load
32-16
8
4
2
1
TE
VE
VM
STAT:QUES:COND?
Long Form: STATus:QUEStionable:CONDition?
STAT:OPER:ENAB
STAT:OPER?
STAT:PRES
STAT:QUES?
Current Error
Not Used
Slave Error
Thermal Error
Voltage Error
Voltage Mode Error
B-29
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