Motorola MC68302 User Manual page 83

Each timer may output a signal on the timer output (TOUT1 or TOUT2) pin
when the reference value is reached, as selected by the output mode (OM)
bit of the corresponding TMR. This signal can be an active-low pulse or a
toggle of the current output. The output can also be used as an input to the
other timer, resulting in a 32-bit timer.
Each timer has a 16-bit TCR, which is used to latch the value of the counter
when a defined transition (of TIN1 or TIN2) is sensed by the corresponding
input capture edge detector. The type of transition triggering the capture is
selected by the capture edge and enable interrupt (CE) bits in the corre-
sponding TMR. Upon a capture or reference event, the corresponding TEA
bit is set, and a maskable interrupt is issued.
3.5.2.1 TIMER MODE REGISTER (TMR1, TMR2). TMR1 and TMR2 are identical
16-bit registers. TMR1 and TMR2, which are memory-mapped read-write
registers to the user, are cleared by reset.
3-36
15
PRESCALER VALUE IPS) CE OM ORI FAR
ICLK
I
AST
I
AST- Reset Timer
This bit performs a software reset of the timer identical to that of an external
reset.
0 =Reset timer (software reset)
1 =Enable timer
ICLK - Input Clock Source for the Timer
00 =Stop count
01 =Master clock
10 =Master clock divided by 16
11 =Corresponding TIN pin, TIN1 or TIN2 (falling edge)
FAR - Free Run/Restart
0= Free run - timer count continues to increment after the reference
value is reached.
1 =Restart - timer count is reset immediately after the reference value
is reached.
ORI - Output Reference Interrupt Enable
0 =Disable interrupt for reference reached (does not affect interrupt on
capture function)
1 =Enable interrupt upon reaching the reference value
MC68302 USER'S MANUAL MOTOROLA