Motorola MC68302 User Manual page 111

Integrated multi-protocol processor
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4-8
SDS1
Serial data strobe 1
SDS2
Serial data strobe 2
In addition to the 144-kbps ISDN 2B
+
D channels, IDL provides channels for
maintenance and auxiliary bandwidth. The IDL bus has five channels:
B1
64-kbps Bearer Channel
B2
64-kbps Bearer Channel
D
16-kbps Signaling Channel
M
8-kbps Maintenance Channel
A
8-kbps Auxiliary Channel
The IMP supports all five channels of the IDL bus. The following table shows
where each channel can be routed. The two B channels can be concatenated
and routed to the same
sec
channel.
IDL Channel
Serial Controllers
D
scc1,scc2,scc3
81
SCC1, SCC2, SCC3
82
SCC1, SCC2, SCC3
M
SMC1
A
SMC2
The IMP supports the request-grant method for contention detection on the
D channel. When the IMP has data to transmit on the D channel, it asserts
L 1 RQ. The physical layer device monitors the physical layer bus for activity
on the D channel and indicates that the channel is free by asserting L 1 GR.
The IMP samples the L 1 GR signal when L 1 SY1 is asserted. If L 1 GR is high
(active), the IMP transmits the first zero of the opening flag in the first bit of
the D channel. If a collision is detected on the D channel, the physical layer
device negates L 1 GR. The IMP then stops its transmission and retransmits
the frame when L 1 GR is asserted again. This is handled automatically for
the first two buffers of the frame.
The IDL interface supports the CCITT 1.460 recommendation for data rate
adaptation. The IDL interface can access each bit of the B channel as an
MC68302 USER'S MANUAL
MOTOROLA

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