Motorola MC68302 User Manual page 230

DTACK is generated internally, then it is an output. It is an input when the
IMP accesses an external device not within the range of the chip-select
logic, or when programmed to be generated externally.
RMC/IOUT1 - Read-Modify-Write Cycle Indication/Interrupt Output 1
This signal functions as AMC in normal operation. RMC is an output signal
that is asserted when a read-modify-write cycle is executed. It indicates
that the cycle is indivisible.
When the M68000 core is disabled, this pin operates as IOUT1. IOUT2-IOUTO
provide the interrupt request output signals from the IMP interrupt con-
troller to an external CPU.
IAC - Internal Access
This output indicates that the current bus cycle accesses an on-chip lo-
cation. This includes the on-chip 4K byte block of internal RAM and registers
(both real and reserved locations), and the system configuration registers
($0F0-$0FF). The above-mentioned bus cycle may originate from the
M68000 core, the IDMA, or an external bus master. Note that the SDMA
accesses the internal dual-port RAM without arbitration on the M68000
bus; therefore, the IAC pin is not asserted in this case. The timing of IAC
is identical to that of the CS3-CSO pins.
IAC can be used to disable an external address/data buffer when the on-
chip dual-port RAM and registers are accessed. An external address/data
buffer with its output enable
(E)
and direction control (dir) may be placed
between the masters and the slaves as shown in Figure 5-2. This saves the
propagation delay and logic required to OR all the various system chip-
select lines together, to determine when to enable the external buffers.
BCLR - Bus Clear
This open-drain output indicates that the M68000 core or the serial OMA
(SOMA) requests the external bus master to release the bus. The core may
be configured to assert this signal when it has a pending interrupt to
execute. The SOMA asserts this signal when one of the SCCs is requesting
OMA service.
When the M68000 core is disabled, this signal is an input to the independent
OMA (IOMA), and is interpreted as a bus release request. It remains an
output from the SOMA in this mode.
MOTOROLA
MC68302 USER'S MANUAL
5-7