Motorola MC68302 User Manual page 45

Integrated multi-protocol processor
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2-18
Table 2-8;.Parameter
RAM
(Sheet 2 of 2)
Address
Width
Block
Description
Base+600
4 Word
SCC3
Rx BOO
Base+608
4Word
SCC3
Rx BD 1
Base+610
4Word
SCC3
Rx BD 2
Base+618
4Word
SCC3
Rx BD 3
Base+620
4Word
SCC3
Rx BD 4
Base+628
4 Word
SCC3
Rx BD 5
Base+630
4Word
SCC3
Rx BD 6
Base+638
4 Word
SCC3
Rx BD 7
Base+640
4 Word
SCC3
Tx BD 0
Base+648
4 Word
SCC3
Tx BD 1
Base+650
4 Word
SCC3
Tx BD 2
Base+658
4 Word
SCC3
Tx BD 3
Base+660
3 Word
SMC
Reserved
Base+666
Word
SMC1
Rx BD
Base+668
Word
SMC1
Tx BD
Base+66A
Word
SMC2
Rx BD
Base+66C
Word
SMC2
Tx BD
Base+66E
6Word
SMC1-SMC2
Internal Use
Base+67A
Word
SCP
Rx/Tx BD
Base+67C
Word
SCC1-SCC3
BERR Channel Number
Base+67E
Word
SMC2
Revision Number
Base+680
SCC3
Specific Protocol Parameters
.
. .
Base+6BF
SCC3
Base+6CO
Reserved
. .
.
Base+7FF
NOTE: Tx BD 4, 5, 6, and 7 are not available to SCC3.
In addition to the internal dual-port RAM, there are a number of internal
registers to support the functions of the various M68000 core peripherals.
The internal registers (see Table 2-9) are memory-mapped registers offset
from the BAR pointer and are located on the internal M68000 bus.
MC68302 USER'S MANUAL
MOTOROLA

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