Motorola MC68302 User Manual page 109

4-6
SIMASK
MASK REGISTER
TOSMC1 TOSMC2
M68000 DATA BUS
TOSCC1
I
SI
MOOE
MODE REGISTER
TOSCC2 TOSCC3
PHYSICAL INTERFACE BUS
LAYER·1 BUS
INTERFACE
ISDN INTERFACE OR SCC1
TIME-SLOT
ASSIGNER
SCC2 SCC3
Figure 4-1. Serial Channels Physical Interface Block Diagram
D, A, and M) is transferred in a 20-bit frame every 125 µs, providing 160-
kbps full-duplex bandwidth. The IMP is an IDL slave device that is clocked
by the IDL bus master (physical layer device). The IMP provides direct con-
nections to the MC145474. Refer to Figure 4-2 for the IDL bus signals.
The IMP has two output data strobe lines (SDS1 and SDS2) for selecting
either or both the 81 and 82 channels. These signals are used for interfacing
devices that do not support the IDL bus. These signals, configured by the
SIMASK register, are active only for bits that are not masked. The IDL signals
are as follows:
L1CLK
L1TXD
IDL clock; input to the IMP.
IDL transmit data; output from the IMP. Valid only for the
bits that are supported by the IDL; three-stated otherwise.
MC68302 USER'S MANUAL MOTOROLA