Motorola MC68302 User Manual page 180

NTSYN - No Transmit SYNC
When this bit is set, the transmitter will not transmit the SYN 1-SYN2 se-
quence before the message. This is useful when totally transparent trans-
mission is required. In this case, the TB, TD, and TR bits should also be
set in the Tx BD.
NOTE
When this bit is set, the BISYNC controller will ignore the SYNF bit;
between messages it will send ones and negate the RTS signal.
REVD - Reverse DATA
When this bit is set, the receiver and transmitter will reverse the character
bit order, transmitting the most significant bit first.
BCS - Block Check Sequence
O=LRC
For even LRC, the PRCRC and PTCRC preset registers in the BISYNC-
specific parameter RAM should be initialized to zero before the chan-
nel is enabled. For odd LRC, the PRCRC and PTCRC registers should
be initialized to ones.
1=CRC16
The PRCRC and PTCRC preset registers should be initialized to a
preset value of all zeros or all ones before the channel is enabled. In
both cases, the transmitter sends the calculated CRC non-inverted,
and the receiver checks the CRC against zero.
The receiver will check character parity when BCS is programmed to LRC
and the receiver is not in transparent mode. The transmitter will transmit
character parity when BCS is programmed to LRC and the transmitter is
not in transparent mode.
Bit 10 - Reserved for future use.
RTR - Receiver Transparent Mode
MOTOROLA
0= The receiver is placed in normal mode with SYNC stripping and con-
trol character recognition operative.
1 =The receiver is placed in transparent mode. SYN Cs, DLEs, and control
characters are only recognized after a leading DLE character. The
receiver will calculate the CRC16 sequence, even if programmed to
LRC while in transparent mode. PRCRC should be first initialized to
the CRC16 preset value before setting this bit.
MC68302 USER'S MANUAL 4-77