Motorola MC68302 User Manual page 10

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MOTOROLA
TABLE OF CONTENTS (Continued)
Title
Page
Number
UART Mask Register ................................................... 4-50
S-Records Programming Example ................................ 4-51
HDLC Controller. ............................................................... 4-52
HDLC Channel Frame Transmission Processing ............. 4-53
HDLC Channel Frame Reception Processing .................. 4-54
HDLC Memory Map .................................................... 4-54
HDLC Programming Model .......................................... 4-55
HDLC Command Set ................................................... 4-55
HDLC Address Recognition .......................................... 4-57
HDLC Maximum Frame Length Register (MFLR) ............. 4-57
HDLC Error-Handling Procedure ................................... 4-57
HDLC Mode Register. .................................................. 4-60
HDLC Receive Buffer Descriptor (Rx BD) ........................ 4-61
HDLC Transmit Buffer Descriptor (Tx BD) ...................... 4-63
HDLC Event Register ................................................... 4-65
HDLC Mask Register .................................................... 4-66
BISYNC Controller ............................................................ 4-66
Bl SYNC Channel Frame Transmission Processing .......... 4-67
BISYNC Channel Frame Reception Processing ............... 4-68
Bl SYNC Memory Map ................................................. 4-49
BISYNC Command Set.. .............................................. 4-70
BISYNC Control Character Recognition ......................... 4-72
BSYNC-BISYNC SYNC Register .................................... 4-74
BDLE-BISYNC OLE Register. ......................................... 4-74
RIC::Vl\Jr i::n,....r_l-l,,nrllinn Prnl"orl11ro ll.-7i:\
-·-
..
_,_
..._,.
---· .
·--··-·····':,:)
-~"
BISYNC Mode Register ................................................ 4-76
BISYNC Receive Buffer Descriptor (Tx BD) ..................... 4-78
Bl SYNC Transmit Buffer Descriptor (Tx BO) ................... 4-81
Bl SYNC Event Register ................................................ 4-83
BISYNC Mask Register ................................................ 4-84
Programming the Bl SYNC Controllers ........................... 4-85
DDCMP Controller ............................................................. 4-86
DDCMP Channel Frame Transmission Processing .......... 4-87
DDCMP Channel Frame Reception Processing ............... 4-88
DDCMP Memory Map ................................................. 4-89
DDCMP Programming Model ....................................... 4-89
DDCMP Command Set ................................................ 4-90
MC68302 USER'S MANUAL
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