~
ANDR/W _ _ _ _ _ _,
CLKO
NOTE: Setup time to
lhe
clock (#47) for
lhe
asynchronous inputs BERR, BGACK, BR, DTACK, and IPL2-IPLO guarantees their
recognition at the next laUing edge of the cloek.
Figure 6-4. Bus Arbitration Timing Diagram
MOTOROLA
MC68302 USER'S MANUAL
6-9