Motorola MC68302 User Manual page 204

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l
Data Length
The data length is the number of octets that the DDCMP controller should
transmit from this BD's data buffer. The data length should be greater than
zero.
Tx Buffer Pointer
This pointer, which contains the address of the associated data buffer, may
be even or odd. The buffer may reside in either internal or external memory.
4.5.14.12 DDCMP EVENT REGISTER. The SCC event register (SCCE) is referred to
as the DDCMP event register when the SCC is configured for DDCMP. It is
an 8-bit register used to report events recognized by the DDCMP channel.
On recognition of an event, the DDCMP controller sets its corresponding bit
in this register. Interrupts generated by this register may be masked in the
DDCMP mask register.
The DDCMP event register is a memory-mapped register that may be read •
at any time. A bit is reset by writing a one (writing zero does not affect a
bit's value). More than one bit may be reset at a time. This register is cleared
by reset.
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3 2
a
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CTS
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TXE
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ABK
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BSY
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TX
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ABO
CTS - Clear-to-Send Status Changed
A change in the status of the CTS line was detected on the DDCMP channel.
The SCC status register may be read to determine the current status.
CD - Carrier Detect Status Changed
A change in the status of the CD line was detected on the DDCMP channel.
The SCC status register may be read to determine the current status.
Bit 5 - Reserved for future use.
TXE - Tx Error
An error (CTS lost or underrun) occurred on the transmitter channel.
RBK - Receive Block
A complete block has been received on the DDCMP channel. A block is
defined as reception of a complete header, a complete message, or a
receiver error condition.
MOTOROLA MC68302 USER'S MANUAL
4-101