Motorola MC68302 User Manual page 129

Integrated multi-protocol processor
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The format of the BDs is the same for each SCC mode of operation (HDLC,
UART, DDCMP, BISYNC, V.110) and for both transmit or receive. Only the
first field (containing status and control bits) differs for each protocol. The
BD format is shown in Figure 4-8.
15
OFFSET+ 0
STATUS AND CONTROL
i--~~~~~~~~~~~~~~~~~~~~~~~~~~~---t
OFFSET + 1
DATA LENGTH
1--~~~~~~~~~~~~~~~~~~~~~~~~~~~---1
OFFSET +4
HIGH-ORDER DATA BUFFER POINTER
1--~~~~~~~~~~~~~~~~~~~~~~~~~~~---1
OFFSET + 6
LOW-ORDER DATA BUFFER POINTER
4-26
Figure 4-8. SCC Buffer Descriptor Format
For frame-oriented protocols (HDLC, B!SYNC, DDCMP, V.110), a message
may reside in as many buffers as are necessary (transmit or receive). Each
buffer has a maximum length of 64K bytes. The CP does not assume that all
buffers of a single frame are currently linked to the BD table, but does assume
that the unlinked buffers will be provided by the processor in time to be
either transmitted or received. Failure to do so will result in an error being
reported by the CP.
For example, assume the first six buffers of the transmit BD table have been
transmitted and await processing by the M68000 core (with all eight buffers
used in the circular queue), and a three-buffer frame awaits transmission.
The first two buffers may be linked to the remaining two entries in the table
as long as the user links the final buffer into the first entry in the BD table
before the IMP attempts its transmission. If the final buffer is not linked in
time to the BD table by the time the CP attempts its transmission, the CP will
report an underrun error.
Buffers allocated to an SCC channel may be located in either internal or
external memory. Memory allocation occurs for each BD individually. If in-
ternal memory is selected, the CP uses only the lower 11 address bits (A 10-0)
as an offset to the internal dual-port RAM. Accesses to the internal memory
by the CP are one clock cycle long and occur without arbitration. If external
memory is selected, the pointers to the data buffers are used by the CP as
24 bits of address. The memory space (function code) of this data buffer
must be set before external buffers can be accessed; it can then be changed
only when the user is sure that the CP is not currently accessing external
buffers for that channel. There are six separate function code registers located
in the parameter RAM for the three SCC channels: three for receive data
buffers (RFCR) and three for transmit data buffers (TFCR).
MC68302 USER'S MANUAL
MOTOROLA

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