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2-14
Figure 2-5 shows the MC68302 IMP configuration control.
M68000 EXCEPTION
VECTOR TABLE
$0FO
BAR ENTRY
$0F4
SCR ENTRY
$0F8
RESERVED
$0FC
RESERVED
BASE+$0
DATA RAM
PARAMETER RAM
INTERNAL REGISTERS
BASE+$FFF
Figure 2-5. MC68302 IMP Configuration Control
The on-chip peripherals, including those peripherals in both the CP ad SIB,
require a 4K-byte block of address space. This 4K-byte block location is de-
termined by writing the intended base address to the BAR in supervisor space
(FC
=
5). The address of the BAR entry is $0FO; however, the actual BAR is a
16-bit value within the BAR entry and is located at $0F2.
After a total system reset, the address space is undefined, and it is not
possible to access the on-chip peripherals until BAR is written. The BAR and
the SCR can always be accessed at their fixed addresses.
NOTE
In 8-bit system bus operation, IMP accesses are not possible until
the low byte of the BAR is written. Since the MOVE.W instruction
writes the high byte followed by the low byte, this instruction guar-
antees the entire word is written.
MC68302 USER'S MANUAL
MOTOROLA
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