Sun Microsystems Ultra 1 Creator Series Service Manual page 210

Ethernet
FBC
FFB
FEPS
FRU
I/O
LED
Mbps
MHz
NVRAM
OBP
PID
POST
RAMDAC
RISC
SCSI
SC-UP
SDB
Glossary-2 Ultra 1 Creator Series Service Manual • August 1996
A type of network hardware that permits communication between systems
connected directly together by transceiver taps, transceiver cables, and various
cable types; coaxial or twisted-pair, fiberoptic.
Frame buffer controller. An ASIC responsible for the interface between the
UPA and the 3DRAM. Also controls graphic draw acceleration.
Fast frame buffer. Circuit card consisting of the FBC, FBRAM, RAMDAC, and
associated circuitry.
Fast Ethernet parallel port SCSI. An ASIC responsible for implementing three
master devices on the SBus: the Ethernet, SCSI, and parallel port.
Field replaceable unit.
Input/output.
Light-emitting diode.
Megabits-per-second.
Megahertz.
ns Nanosecond.
Non-volatile random access memory. Stores system variables used by the boot
PROM. Contains the system hostIDnumber and Ethernet address.
OpenBoot
™
PROM. A routine that allows testing of control registers, network controller,
diskette drive system, memory, cache, system clock, and network monitoring.
Process ID.
Power-on self-test. Initialized at system turn-on or when the system is
rebooted. A series of tests that verify system board components are operating
properly.
RAM digital-to-analog converter. An ASIC responsible for direct interface to
3DRAM. Also provides onboard phase-lock loop (PLL) and clock generator
circuitry for the pixel clock
Reset, interrupt, scan, and clock. An ASIC responsible for reset, interrupt, scan,
and clock.
Small computer system interface.
System controller uniprocessor. An ASIC responsible for UPA and memory
control.
Spitfire data buffer.