Sun Microsystems Ultra 1 Creator Series Service Manual page 200

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313-pin BGA package
3.3-VDC and 5-VDC (for RAMDAC ASIC) supply voltage
C.2.6
RAM Digital-to-Analog Controller
The RAM digital-to-analog controller (RAMDAC) ASIC is listed for reference. It is
being designed in conjunction with an outside vendor.
A highlight of the RAMDAC ASIC features follow:
Built in VTG
Direct interface to 3DRAM
Onboard phase-lock loop (PLL) and clock generator circuitry for the pixel clock
64 X 64 cursor LUT
Direct support for X visual types
208-pin PQFP package
5-VDC supply voltage
C.2.7
Fast Ethernet Parallel Port SCSI
The fast Ethernet parallel port SCSI (FEPS) ASIC provides throughput for I/O
devices connected to the Ethernet, SCSI, and parallel ports.
A highlight of the FEPS ASIC features follow:
Integrates 20 Mbytes-per-second SCSI interface core with low system overhead
Integrates 10 Mbits-per-second and 100 Mbit-per-second Ethernet
Complies with IEEE 1496 SBus specification. Also provides for 64-bit SBUS
transfers
Supports SBus extended transfer and 64-byte burst transfer
25-MHz SBus operation
5-VDC supply voltage
C.2.8
Slave I/O
The slave I/O (SLAVIO) ASIC integrates serial ports and Ebus control.
A highlight of the SLAVIO ASIC features follow:
Connects Sunness I/O devices through the Ebus
C-14
Ultra 1 Creator Series Service Manual • August 1996

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