Toshiba 4560 Service Manual page 76

7.5.3 Automatic exposure sensor circuit
By the action of IC1, the incidence of light upon photocell PD1 is generated as an AES signal on
J11-B4 (PWA-LGC).
Dim reflected light
Intense reflected light
7.5.4 Arithmetic and control unit
The arithmetic and control unit is composed of the following four blocks.
1 AD converter
The AES signal is input into the analog input terminals of the CPU (IC35) and converted to
digital.
2 SRAM with built-in battery (BC-RAM)
Consists of IC37, which stores exposure adjustment data to ensure that optimum exposure is
performed for each reproduction ratio and for automatic exposure.
3 Main CPU (IC35)
Incorporates software which computes the voltage to be applied to the lamp in accordance with
the copying mode, such as enlargement/reduction, automatic exposure, and manual exposure,
and the adjustment data in BC-RAM.
4 PWM timer circuit
Consists of the circuit shown in figure below.
The data resulting from the computation performed by the CPU described in item 3 above, are
converted to PWM signals by the gate array, and output to J2-A17 via IC18 from the PWM
output terminal of the gate array.
4560/4570 OPTICAL
Small AES output
Large AES output
Gate array
7407
PWM
IC18
Lamp regulator
7 - 14
PS-LRG
Nov. 1997 © TOSHIBA