Toshiba 4560 Service Manual page 315

18.11.5 Reset circuit
This circuit generates the CPU reset signal at instantaneous disconnection and drop in the power volt-
age. This circuit has a watchdog timer for analyzing CPU system operation.
After the power is turned ON, IC3 pin 8 is normally H-level. However, when a power OFF or an error
causes the 5 V power supply to drop to 4.2 V or less, IC3 pin 8 becomes L-level to reset the CPU and stop
system operation.
During normal operation, a clock of fixed cycle is input to IC3 pin 3 from the CPU to clear the watchdog
timer built into IC3. However, if a system error causes the clock from the CPU to stop being input, IC3 pin
8 becomes L-level to reset the CPU and stop the system.
R31 is normally not mounted as it is a resistor for stopping the watchdog timer.
Nov. 1997 © TOSHIBA 18 - 57 4560/4570 RADF